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Searched refs:rtc (Results 1 – 25 of 1246) sorted by relevance

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/freebsd/sys/kern/
H A Dsubr_rtc.c137 struct rtc_instance *rtc; in settime_task_func() local
140 rtc = arg; in settime_task_func()
141 if (!(rtc->flags & CLOCKF_SETTIME_NO_TS)) { in settime_task_func()
143 if (!(rtc->flags & CLOCKF_SETTIME_NO_ADJ)) { in settime_task_func()
145 timespecadd(&ts, &rtc->resadj, &ts); in settime_task_func()
151 error = CLOCK_SETTIME(rtc->clockdev, &ts); in settime_task_func()
153 device_printf(rtc->clockdev, "CLOCK_SETTIME error %d\n", error); in settime_task_func()
213 struct rtc_instance *rtc, *newrtc; in clock_register_flags() local
229 LIST_FOREACH(rtc, &rtc_list, rtc_entries) { in clock_register_flags()
230 if (rtc->resolution > newrtc->resolution) { in clock_register_flags()
[all …]
/freebsd/sys/amd64/vmm/io/
H A Dvrtc.c171 rtcset(struct rtcdev *rtc, int val) in rtcset() argument
177 return ((rtc->reg_b & RTCSB_BIN) ? val : bin2bcd_data[val]); in rtcset()
185 struct rtcdev *rtc; in secs_to_rtc() local
223 rtc = &vrtc->rtcdev; in secs_to_rtc()
224 rtc->sec = rtcset(rtc, ct.sec); in secs_to_rtc()
225 rtc->min = rtcset(rtc, ct.min); in secs_to_rtc()
227 if (rtc->reg_b & RTCSB_24HR) { in secs_to_rtc()
249 rtc->hour = rtcset(rtc, hour); in secs_to_rtc()
251 if ((rtc->reg_b & RTCSB_24HR) == 0 && ct.hour >= 12) in secs_to_rtc()
252 rtc->hour |= 0x80; /* set MSB to indicate PM */ in secs_to_rtc()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dmoxa,moxart-rtc.txt5 - compatible : Should be "moxa,moxart-rtc"
6 - rtc-sclk-gpios : RTC sclk gpio, with zero flags
7 - rtc-data-gpios : RTC data gpio, with zero flags
8 - rtc-reset-gpios : RTC reset gpio, with zero flags
12 rtc: rtc {
13 compatible = "moxa,moxart-rtc";
14 rtc-sclk-gpios = <&gpio 5 0>;
15 rtc-data-gpios = <&gpio 6 0>;
16 rtc-reset-gpios = <&gpio 7 0>;
H A Dsa1100-rtc.txt4 - compatible: should be "mrvl,sa1100-rtc"
7 - interrupts: Should be two. The first interrupt number is the rtc alarm
8 interrupt and the second interrupt number is the rtc hz interrupt.
12 rtc: rtc@d4010000 {
13 compatible = "mrvl,mmp-rtc";
16 interrupt-names = "rtc 1Hz", "rtc alarm";
H A Drtc-mt7622.txt5 "mediatek,mt7622-rtc", "mediatek,soc-rtc" : for MT7622 SoC
10 - clock-names : Should contain "rtc" entries
14 rtc: rtc@10212800 {
15 compatible = "mediatek,mt7622-rtc",
16 "mediatek,soc-rtc";
20 clock-names = "rtc";
H A Darmada-380-rtc.txt7 "marvell,armada-380-rtc" for Armada 38x SoC
8 "marvell,armada-8k-rtc" for Aramda 7K/8K SoCs
12 * "rtc" for the RTC registers
13 * "rtc-soc" for the SoC related registers and among them the one
19 rtc@a3800 {
20 compatible = "marvell,armada-380-rtc";
22 reg-names = "rtc", "rtc-soc";
H A Dnxp,lpc1788-rtc.txt7 - compatible : must contain "nxp,lpc1788-rtc"
10 - clocks : Must contain clock specifiers for rtc and register clock
11 - clock-names : Must contain "rtc" and "reg"
15 rtc: rtc@40046000 {
16 compatible = "nxp,lpc1788-rtc";
20 clock-names = "rtc", "reg";
H A Drtc-omap.txt5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
12 - reg: Address range of rtc register set
13 - interrupts: rtc timer, alarm interrupts in order
16 - system-power-controller: whether the rtc is controlling the system power
18 - clocks: Any internal or external clocks feeding in to rtc
35 rtc@1c23000 {
36 compatible = "ti,da830-rtc";
H A Drtc-mt6397.txt16 "mediatek,mt6323-rtc": for MT6323 PMIC
17 "mediatek,mt6358-rtc": for MT6358 PMIC
18 "mediatek,mt6366-rtc", "mediatek,mt6358-rtc": for MT6366 PMIC
19 "mediatek,mt6397-rtc": for MT6397 PMIC
28 rtc {
29 compatible = "mediatek,mt6323-rtc";
H A Drtc-meson.txt5 * "amlogic,meson6-rtc"
6 * "amlogic,meson8-rtc"
7 * "amlogic,meson8b-rtc"
8 * "amlogic,meson8m2-rtc"
25 rtc: rtc@740 {
26 compatible = "amlogic,meson6-rtc";
H A Dspear-rtc.txt4 - compatible : "st,spear600-rtc"
5 - reg : Address range of the rtc registers
6 - interrupt: Should contain the rtc interrupt number
10 rtc@fc000000 {
11 compatible = "st,spear600-rtc";
H A Dstericsson,coh901331.txt5 - reg: address range of rtc register set.
6 - interrupts: rtc alarm interrupt.
7 - clocks: phandle to the rtc clock source
10 rtc: rtc@c0017000 {
H A Dsprd,sc27xx-rtc.txt4 - compatible: should be "sprd,sc2731-rtc".
5 - reg: address offset of rtc register.
6 - interrupts: rtc alarm interrupt.
20 rtc@280 {
21 compatible = "sprd,sc2731-rtc";
H A Dimxdi-rtc.txt4 - compatible: should be: "fsl,imx25-rtc"
7 - clocks: should contain the phandle for the rtc clock
8 - interrupts: rtc alarm interrupt
15 rtc@53ffc000 {
16 compatible = "fsl,imx25-rtc";
H A Drtc-aspeed.txt6 * aspeed,ast2400-rtc for the ast2400
7 * aspeed,ast2500-rtc for the ast2500
8 * aspeed,ast2600-rtc for the ast2600
17 rtc@1e781000 {
18 compatible = "aspeed,ast2400-rtc";
H A Dstmp3xxx-rtc.txt5 * "fsl,stmp3xxx-rtc"
8 - interrupts: rtc alarm interrupt
17 rtc@80056000 {
18 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
H A Ddigicolor-rtc.txt6 - compatible: should be "cnxt,cx92755-rtc"
9 - interrupts: rtc alarm interrupt
13 rtc@f0000c30 {
14 compatible = "cnxt,cx92755-rtc";
H A Drtc-mt2712.txt4 - compatible : Should be "mediatek,mt2712-rtc" : for MT2712 SoC
10 rtc: rtc@10011000 {
11 compatible = "mediatek,mt2712-rtc";
H A Dmicrochip,pic32-rtc.txt8 - compatible: should be: "microchip,pic32mzda-rtc"
16 rtc: rtc@1f8c0000 {
17 compatible = "microchip,pic32mzda-rtc";
H A Dxgene-rtc.txt6 - compatible : Should be "apm,xgene-rtc"
22 rtc: rtc@10510000 {
23 compatible = "apm,xgene-rtc";
H A Dnvidia,tegra20-rtc.txt9 - compatible : For Tegra20, must contain "nvidia,tegra20-rtc". Otherwise,
10 must contain '"nvidia,<chip>-rtc", "nvidia,tegra20-rtc"', where <chip>
20 compatible = "nvidia,tegra20-rtc";
/freebsd/contrib/ntp/libparse/
H A Dclk_rawdcf.c407 u_long rtc = CVT_NONE; in cvt_rawdcf() local
451 rtc = CVT_FAIL|CVT_BADFMT; in cvt_rawdcf()
547 if (rtc == CVT_NONE) in cvt_rawdcf()
549 rtc = convert_rawdcf(buffer, size, &dcfparameter, clock_time); in cvt_rawdcf()
550 if (rtc == CVT_OK) in cvt_rawdcf()
554 newtime = parse_to_unixtime(clock_time, &rtc); in cvt_rawdcf()
555 if ((rtc == CVT_OK) && t) in cvt_rawdcf()
565 rtc = CVT_SKIP; in cvt_rawdcf()
572 return rtc; in cvt_rawdcf()
732 unsigned int rtc; in inp_rawdcf() local
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dmt6397.txt32 - rtc
34 - compatible: "mediatek,mt6323-rtc"
35 - compatible: "mediatek,mt6331-rtc"
36 - compatible: "mediatek,mt6358-rtc"
37 - compatible: "mediatek,mt6397-rtc"
38 For details, see ../rtc/rtc-mt6397.txt
H A Dqcom-pm8xxx.txt63 "qcom,pm8058-rtc"
64 "qcom,pm8921-rtc"
65 "qcom,pm8941-rtc"
66 "qcom,pm8018-rtc"
94 rtc@11d {
95 compatible = "qcom,pm8921-rtc";
/freebsd/sys/contrib/device-tree/src/arm/moxa/
H A Dmoxart.dtsi75 rtc: rtc { label
76 compatible = "moxa,moxart-rtc";
77 gpio-rtc-sclk = <&gpio 5 0>;
78 gpio-rtc-data = <&gpio 6 0>;
79 gpio-rtc-reset = <&gpio 7 0>;

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