Searched refs:regLiveIn (Results 1 – 1 of 1) sorted by relevance
244 regLiveIn, enumerator674 setPhysRegState(Reg, regLiveIn); in reloadAtBegin()689 if (RegUnitStates[FirstUnit] == regLiveIn) in reloadAtBegin()1230 case regLiveIn: in dumpState()