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Searched refs:regClass (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td1127 class SrcRegOrImm9<RegisterClass regClass, string operandType>
1128 : RegOrImmOperand<regClass, operandType> {
1130 let DecoderMethod = DecoderMethodName # "<" # regClass.Size # ">";
1133 class SrcRegOrImm9_t16<string operandType, RegisterClass regClass = VS_16>
1134 : SrcRegOrImm9<regClass, operandType> {
1200 class SrcReg9<RegisterClass regClass> : RegisterOperand<regClass> {
1201 let DecoderMethod = "decodeSrcReg9<" # regClass.Size # ">";
1253 class AVOperand<RegisterClass regClass, string decoder>
1254 : RegisterOperand<regClass> {
1255 let DecoderMethod = decoder # "<" # regClass.Size # ">";
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H A DFLATInstructions.td212 string opName, RegisterClass regClass, bit HasTiedOutput = 0,
216 defvar vdata_op = getLdStRegisterOperand<regClass>.ret;
269 multiclass FLAT_Global_Load_Pseudo<string opName, RegisterClass regClass, bit HasTiedInput = 0> {
271 def "" : FLAT_Load_Pseudo<opName, regClass, HasTiedInput, 1>,
273 def _SADDR : FLAT_Load_Pseudo<opName, regClass, HasTiedInput, 1, 1>,
293 class FLAT_Global_Load_AddTid_Pseudo <string opName, RegisterClass regClass,
296 (outs regClass:$vdst),
299 !if(HasTiedOutput, (ins regClass:$vdst_in), (ins))),
312 multiclass FLAT_Global_Load_AddTid_Pseudo<string opName, RegisterClass regClass,
314 def "" : FLAT_Global_Load_AddTid_Pseudo<opName, regClass, HasTiedOutput>,
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H A DSIWholeQuadMode.cpp1488 const TargetRegisterClass *regClass = in lowerCopyInstrs() local
1490 if (TRI->isVGPRClass(regClass)) { in lowerCopyInstrs()
1491 const unsigned MovOp = TII->getMovOpcode(regClass); in lowerCopyInstrs()
H A DSIInstrInfo.cpp10082 const TargetRegisterClass *regClass = in getInstructionUniformity() local
10084 return RI.isSGPRClass(regClass) ? InstructionUniformity::AlwaysUniform in getInstructionUniformity()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCTargetDesc.cpp124 int16_t regClass = Desc.operands()[OpNo].RegClass; in getRegNumForOperand() local
125 switch (regClass) { in getRegNumForOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.td207 class MemOperand<RegisterClass regClass> : RegisterOperand<regClass>{