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/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/
H A Dqcom,smsm.txt4 information between the processors in a Qualcomm SoC. Each processor is
5 assigned 32 bits of state that can be modified. A processor can through a
7 certain bit owned by a certain remote processor.
19 signaling the N:th remote processor
27 Definition: identifier of the local processor in the list of hosts, or
29 matrix representing the local processor
43 Each processor's state bits are described by a subnode of the smsm device node.
45 processor's state bits or the local processors bits. The node names are not
63 to belong to a remote processor
73 Definition: one entry specifying remote IRQ used by the remote processor
[all …]
H A Dqcom,smd.txt15 processor of some sort - or in SMD language an "edge". The name of the edges
22 Definition: should specify the IRQ used by the remote processor to
23 signal this processor about communication related updates
35 signaling the remote processor:
43 Definition: the identifier of the remote processor in the smd channel
49 Definition: the identifier for the remote processor as known by the rest
H A Dqcom,smp2p.txt6 identified in the system by the directed edge (local processor ID to remote
7 processor ID) and a string identifier.
83 The following example shows the SMP2P setup with the wireless processor,
84 defined from the 8974 apps processor's point-of-view. It encompasses one
H A Dqcom,apr.txt4 communication between Application processor and QDSP. APR is mainly
15 Definition: Destination processor ID.
44 11 - Core voice processor.
/freebsd/contrib/ntp/scripts/ntpsweep/
H A Dntpsweep.in62 Host st offset(s) version system processor
105 my $processor = "";
117 my $vars = ntp_read_vars(0, [qw(processor system daemon_version)], $host) || {};
120 $processor = $vars->{processor};
135 # Shorten processor string
136 $processor =~ s/unknown//;
156 (substr $system, 0, 12), (substr $processor, 0, 9);
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dti,keystone-rproc.txt5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
10 a dedicated local power/sleep controller etc. The DSP processor core in
11 Keystone 2 SoCs is usually a TMS320C66x CorePac processor.
17 or optional properties that enable the OS running on the host processor (ARM
18 CorePac) to perform the device management of the remote processor and to
19 communicate with the remote processor.
56 the remote processor to the host processor. The values should
67 stack. This will be used to interrupt the remote processor.
H A Dst-rproc.txt7 the bootloader starts a co-processor, the primary OS must detect its state
17 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
18 - clock-frequency Clock frequency to set co-processor at if the bootloader
21 for the co-processor
H A Dwkup_m3_rproc.txt4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
6 that cannot be controlled from the MPU. This CM3 processor requires a firmware
12 A wkup_m3 device node is used to represent the Wakeup M3 processor instance
29 booting the wkup_m3 remote processor.
H A Dimx-rproc.txt4 This binding provides support for ARM Cortex M4 Co-processor found on some
11 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
H A Dti,davinci-rproc.txt5 is used to offload some of the processor-intensive tasks or algorithms, for
8 The processor cores in the sub-system usually contain additional sub-modules
10 controller, a dedicated local power/sleep controller etc. The DSP processor
H A Dmtk,scp.txt4 This binding provides support for ARM Cortex M4 Co-processor found on some
13 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Domap-mailbox.txt6 various processor subsystems and is connected on an interconnect bus. The
12 within a processor subsystem, and there can be more than one line going to a
13 specific processor's interrupt controller. The interrupt line connections are
25 routed to different processor sub-systems on DRA7xx as they are routed through
29 all these clusters are multiplexed and routed to different processor subsystems
57 - ti,mbox-num-users: Number of targets (processor devices) that the mailbox
81 used for the communication between the host processor and a remote processor.
99 multiple interrupt lines connected to the MPU processor.
109 processor on AM33xx/AM43xx SoCs.
113 A device needing to communicate with a target processor device should specify
/freebsd/contrib/expat/xmlwf/
H A Dunixfilemap.c61 void (*processor)(const void *, size_t, const tchar *, void *arg), in filemap()
92 processor(&c, 0, name, arg); in filemap()
103 processor(p, nbytes, name, arg); in filemap()
H A Dwin32filemap.c58 void (*processor)(const void *, size_t, const TCHAR *, void *arg), in filemap()
85 processor(&c, 0, name, arg); in filemap()
102 processor(p, size, name, arg); in filemap()
H A Dreadfilemap.c87 void (*processor)(const void *, size_t, const tchar *, void *arg), in filemap()
119 processor(&c, 0, name, arg); in filemap()
142 processor(p, nbytes, name, arg); in filemap()
H A Dfilemap.h49 void (*processor)(const void *, size_t, const wchar_t *, void *arg),
53 void (*processor)(const void *, size_t, const char *, void *arg),
/freebsd/sys/contrib/device-tree/Bindings/reserved-memory/
H A Dqcom,cmd-db.txt5 resource address for a system resource managed by a remote processor. The data
6 is stored in a shared memory region and is loaded by the remote processor.
11 remote processor and made available in the shared memory.
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Darm,malidp.txt15 the processor.
18 - interrupt-names: name of the engine inside the processor that will
25 - "mclk": for the main processor clock
26 - "pxlclk": for the pixel clock feeding the output PLL of the processor.
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSchedule.td27 // processor resources and latency with each SchedReadWrite type.
105 // A processor may only implement part of published ISA, due to either new ISA
109 // For a processor which doesn't support some feature(s), the schedule model
132 // Define a kind of processor resource that may be common across
136 // Define a number of interchangeable processor resources. NumUnits
185 // SchedModel ties these units to a processor for any stand-alone defs
195 // Subtargets typically define processor resource kind and number of
249 // SchedModel ties these resources to a processor.
264 // Allow a processor to mark some scheduling classes as unsupported
267 // Allow a processor to mark some scheduling classes as single-issue.
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/freebsd/contrib/file/magic/Magdir/
H A Dm46 >0 regex \^dnl\ M4 macro processor script text
9 >0 regex \^AC_DEFUN\\(\\[ M4 macro processor script text
/freebsd/sys/contrib/device-tree/Bindings/powerpc/nintendo/
H A Dgamecube.txt16 Represents the interface between the graphics processor and a external
27 Represents the data and control interface between the main processor
28 and graphics and audio processor.
47 Represents the digital signal processor interface, designed to offload
H A Dwii.txt25 Represents the interface between the graphics processor and a external
36 Represents the data and control interface between the main processor
37 and graphics and audio processor.
58 Represents the digital signal processor interface, designed to offload
/freebsd/crypto/openssl/
H A DNOTES-VALGRIND.md46 This variable controls the processor-specific code on Intel processors.
48 processor, and use it to its fullest capability. This variable can be
57 processor and Valgrind version you are running tests on. More information
/freebsd/contrib/kyua/m4/
H A Duname.m432 dnl Checks for the current architecture name (aka processor type) and defines
38 [Name of the system architecture (aka processor type)])
43 [Name of the system architecture (aka processor type)])
/freebsd/crypto/openssl/doc/man3/
H A DOPENSSL_s390xcap.pod5 OPENSSL_s390xcap - the IBM z processor capabilities vector
34 The name of a processor generation. A bit in the environment variable's
35 mask is set to one if and only if the specified processor generation
174 Disables all instruction set extensions which the z196 processor does not implement:

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