/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | rcar-pci.txt | 4 compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC; 5 "renesas,pcie-r8a7743" for the R8A7743 SoC; 6 "renesas,pcie-r8a7744" for the R8A7744 SoC; 7 "renesas,pcie-r8a774a1" for the R8A774A1 SoC; 8 "renesas,pcie-r8a774b1" for the R8A774B1 SoC; 9 "renesas,pcie-r8a774c0" for the R8A774C0 SoC; 10 "renesas,pcie-r8a7779" for the R8A7779 SoC; 11 "renesas,pcie-r8a7790" for the R8A7790 SoC; 12 "renesas,pcie-r8a7791" for the R8A7791 SoC; 13 "renesas,pcie-r8a7793" for the R8A7793 SoC; [all …]
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H A D | layerscape-pci.txt | 4 and thus inherits all the common properties defined in snps,dw-pcie.yaml. 17 "fsl,ls1021a-pcie" 18 "fsl,ls2080a-pcie", "fsl,ls2085a-pcie" 19 "fsl,ls2088a-pcie" 20 "fsl,ls1088a-pcie" 21 "fsl,ls1046a-pcie" 22 "fsl,ls1043a-pcie" 23 "fsl,ls1012a-pcie" 24 "fsl,ls1028a-pcie" 26 "fsl,ls1028a-pcie-ep", "fsl,ls-pcie-ep" [all …]
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H A D | axis,artpec6-pcie.txt | 4 and thus inherits all the common properties defined in snps,dw-pcie.yaml. 7 - compatible: "axis,artpec6-pcie", "snps,dw-pcie" for ARTPEC-6 in RC mode; 8 "axis,artpec6-pcie-ep", "snps,dw-pcie" for ARTPEC-6 in EP mode; 9 "axis,artpec7-pcie", "snps,dw-pcie" for ARTPEC-7 in RC mode; 10 "axis,artpec7-pcie-ep", "snps,dw-pcie" for ARTPEC-7 in EP mode; 21 - axis,syscon-pcie: A phandle pointing to the ARTPEC-6 system controller, 26 pcie@f8050000 { 27 compatible = "axis,artpec6-pcie", "snps,dw-pcie"; 49 axis,syscon-pcie = <&syscon>;
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H A D | mediatek-pcie.txt | 5 "mediatek,mt2701-pcie" 6 "mediatek,mt2712-pcie" 7 "mediatek,mt7622-pcie" 8 "mediatek,mt7623-pcie" 9 "mediatek,mt7629-pcie" 10 "airoha,en7523-pcie" 34 - phy-names : Must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the 48 - reset-names: Must be "pcie-rst0", "pcie-rst1", "pcie-rstN".. based on the 85 pcie: pcie@1a140000 { 86 compatible = "mediatek,mt7623-pcie"; [all …]
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H A D | mvebu-pci.txt | 6 marvell,armada-370-pcie 7 marvell,armada-xp-pcie 8 marvell,dove-pcie 9 marvell,kirkwood-pcie 65 - marvell,pcie-port: the physical PCIe port number 77 - marvell,pcie-lane: the physical PCIe lane number, for ports having 92 pcie-controller { 93 compatible = "marvell,armada-xp-pcie"; 137 pcie@1,0 { 148 marvell,pcie-port = <0>; [all …]
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H A D | fsl,imx6q-pcie.txt | 4 and thus inherits all the common properties defined in designware-pcie.txt. 8 - "fsl,imx6q-pcie" 9 - "fsl,imx6sx-pcie", 10 - "fsl,imx6qp-pcie" 11 - "fsl,imx7d-pcie" 12 - "fsl,imx8mq-pcie" 45 Additional required properties for imx6sx-pcie: 50 - power-domain-names: Must be "pcie", "pcie_phy" 52 Additional required properties for imx7d-pcie and imx8mq-pcie: 60 - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. [all …]
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H A D | pci-keystone.txt | 6 Documentation/devicetree/bindings/pci/designware-pcie.txt 8 Please refer to Documentation/devicetree/bindings/pci/designware-pcie.txt 14 compatibility: Should be "ti,keystone-pcie" for RC on Keystone2 SoC 15 Should be "ti,am654-pcie-rc" for RC on AM654x SoC 24 (required if the compatible is "ti,keystone-pcie") 26 (required if the compatible is "ti,am654-pcie-rc". 28 ti,syscon-pcie-id : phandle to the device control module required to set device 30 ti,syscon-pcie-mode : phandle to the device control module required to configure 78 compatibility: Should be "ti,am654-pcie-ep" for EP on AM654x SoC 85 Documentation/devicetree/bindings/pci/designware-pcie.txt [all …]
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H A D | samsung,exynos5440-pcie.txt | 4 and thus inherits all the common properties defined in designware-pcie.txt. 7 - compatible: "samsung,exynos5440-pcie" 19 Documentation/devicetree/bindings/pci/designware-pcie.txt 25 pcie_phy0: pcie-phy@270000 { 32 pcie@290000 { 33 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; 37 clock-names = "pcie", "pcie_bus"; 52 pcie@290000 { 56 pcie@2a0000 {
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H A D | ti-pci.txt | 4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated) 5 Should be "ti,dra7-pcie-ep" for EP (deprecated) 6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode 7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode 8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode 9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode 11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the 13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", 14 where <X> is the instance number of the pcie from the HW spec. 15 - num-lanes as specified in ../snps,dw-pcie.yaml [all …]
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H A D | qcom,pcie.txt | 7 - "qcom,pcie-ipq8064" for ipq8064 8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065 9 - "qcom,pcie-apq8064" for apq8064 10 - "qcom,pcie-apq8084" for apq8084 11 - "qcom,pcie-msm8996" for msm8996 or apq8096 12 - "qcom,pcie-ipq4019" for ipq4019 13 - "qcom,pcie-ipq8074" for ipq8074 14 - "qcom,pcie-qcs404" for qcs404 15 - "qcom,pcie-sc8180x" for sc8180x 16 - "qcom,pcie-sdm845" for sdm845 [all …]
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H A D | brcm,iproc-pcie.txt | 5 "brcm,iproc-pcie" for the first generation of PAXB based controller, 7 "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based 9 "brcm,iproc-pcie-paxc" for the first generation of PAXC based 11 "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based 28 - phy-names: must be "pcie-phy" 34 - brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done 37 If the brcm,pcie-ob property is present, the following properties become 41 - brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal 71 - brcm,pcie-msi-inten: Needs to be present for some older iProc platforms that 75 pcie0: pcie@18012000 { [all …]
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H A D | amlogic,meson-pcie.txt | 6 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml. 13 - "amlogic,axg-pcie" for AXG SoC Family 14 - "amlogic,g12a-pcie" for G12A SoC Family 33 - phy-names: must contain "pcie" 36 should be "pci". As specified in snps,dw-pcie.yaml 41 pcie: pcie@f9800000 { 42 compatible = "amlogic,axg-pcie", "snps,dw-pcie"; 69 phy-names = "pcie";
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H A D | nvidia,tegra20-pcie.txt | 5 - "nvidia,tegra20-pcie": for Tegra20 6 - "nvidia,tegra30-pcie": for Tegra30 7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132 8 - "nvidia,tegra210-pcie": for Tegra210 9 - "nvidia,tegra186-pcie": for Tegra186 79 - pcie 158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes. 168 pcie-controller@80003000 { 169 compatible = "nvidia,tegra20-pcie"; 230 pcie-controller@80003000 { [all …]
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H A D | rockchip-pcie-ep.txt | 4 - compatible: Should contain "rockchip,rk3399-pcie-ep" 30 them won't be used for your cases. Entries are of the form "pcie-phy-N": 32 (see example below and you MUST also refer to ../phy/rockchip-pcie-phy.txt 40 pcie0-ep: pcie@f8000000 { 41 compatible = "rockchip,rk3399-pcie-ep"; 59 phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3";
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-xp-mv78460.dtsi | 70 pciec: pcie@82000000 { 71 compatible = "marvell,armada-xp-pcie"; 116 pcie1: pcie@1,0 { 133 marvell,pcie-port = <0>; 134 marvell,pcie-lane = <0>; 144 pcie2: pcie@2,0 { 161 marvell,pcie-port = <0>; 162 marvell,pcie-lane = <1>; 172 pcie3: pcie@3,0 { 189 marvell,pcie-port = <0>; [all …]
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H A D | armada-xp-mv78260.dtsi | 53 pciec: pcie@82000000 { 54 compatible = "marvell,armada-xp-pcie"; 95 pcie1: pcie@1,0 { 112 marvell,pcie-port = <0>; 113 marvell,pcie-lane = <0>; 123 pcie2: pcie@2,0 { 140 marvell,pcie-port = <0>; 141 marvell,pcie-lane = <1>; 151 pcie3: pcie@3,0 { 168 marvell,pcie-port = <0>; [all …]
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H A D | armada-385.dtsi | 36 pciec: pcie { 37 compatible = "marvell,armada-370-pcie"; 64 * pcie@4,0 is not available. 66 pcie1: pcie@1,0 { 83 marvell,pcie-port = <0>; 84 marvell,pcie-lane = <0>; 94 pcie2: pcie@2,0 { 111 marvell,pcie-port = <1>; 112 marvell,pcie-lane = <0>; 122 pcie3: pcie@3,0 { [all …]
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H A D | armada-xp-mv78230.dtsi | 52 pciec: pcie@82000000 { 53 compatible = "marvell,armada-xp-pcie"; 80 pcie1: pcie@1,0 { 97 marvell,pcie-port = <0>; 98 marvell,pcie-lane = <0>; 108 pcie2: pcie@2,0 { 125 marvell,pcie-port = <0>; 126 marvell,pcie-lane = <1>; 136 pcie3: pcie@3,0 { 153 marvell,pcie-port = <0>; [all …]
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H A D | armada-380.dtsi | 37 pcie { 38 compatible = "marvell,armada-370-pcie"; 61 pcie@1,0 { 78 marvell,pcie-port = <0>; 79 marvell,pcie-lane = <0>; 90 pcie@2,0 { 107 marvell,pcie-port = <1>; 108 marvell,pcie-lane = <0>; 119 pcie@3,0 { 136 marvell,pcie-port = <2>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | nvidia,tegra124-xusb-padctl.txt | 83 For Tegra124 and Tegra132, the following pads exist: usb2, ulpi, hsic, pcie 86 For Tegra210, the following pads exist: usb2, hsic, pcie and sata. Below is 148 - pcie: pcie-0, pcie-1, pcie-2, pcie-3, pcie-4 149 - functions: "pcie", "usb3-ss" 158 - pcie: pcie-0, pcie-1, pcie-2, pcie-3, pcie-4, pcie-5, pcie-6 159 - functions: "pcie-x1", "usb3-ss", "pcie-x4" 329 pcie { 333 pcie-0 { 338 pcie-1 { 343 pcie-2 { [all …]
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H A D | brcm,cygnus-pcie-phy.txt | 4 - compatible: must be "brcm,cygnus-pcie-phy" 19 compatible = "brcm,cygnus-pcie-phy"; 35 pcie0: pcie@18012000 { 39 phy-names = "pcie-phy"; 42 pcie1: pcie@18013000 { 46 phy-names = "pcie-phy";
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | nvidia,tegra124-xusb-padctl.txt | 77 - pcie-0, pcie-1, pcie-2, pcie-3, pcie-4, sata-0: 79 Valid functions for this group are: "pcie", "usb3", "sata", "rsvd". 100 pcie-controller@1003000 { 104 phy-names = "pcie"; 117 nvidia,lanes = "pcie-0", "pcie-1"; 122 pcie { 123 nvidia,lanes = "pcie-2", "pcie-3", 124 "pcie-4"; 125 nvidia,function = "pcie";
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-j784s4-evm-pcie0-pcie1-ep.dtso | 36 pcie0_ep: pcie-ep@2900000 { 37 compatible = "ti,j784s4-pcie-ep"; 45 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>; 55 phy-names = "pcie-phy"; 58 pcie1_ep: pcie-ep@2910000 { 59 compatible = "ti,j784s4-pcie-ep"; 67 ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>; 77 phy-names = "pcie-phy";
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | cyrus_p5020.dts | 90 pci0: pcie@ffe200000 { 94 pcie@0 { 105 pci1: pcie@ffe201000 { 109 pcie@0 { 120 pci2: pcie@ffe202000 { 124 pcie@0 { 135 pci3: pcie@ffe203000 { 139 pcie@0 {
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/freebsd/sys/modules/iwlwifi/ |
H A D | Makefile | 28 SRCS+= pcie/ctxt-info-gen3.c pcie/ctxt-info.c 29 SRCS+= pcie/drv.c pcie/rx.c pcie/trans-gen2.c pcie/trans.c 30 SRCS+= pcie/tx-gen2.c pcie/tx.c
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