1 //===-- llvm/CodeGen/TargetFrameLowering.h ----------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Interface to describe the layout of a stack frame on the target machine. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_CODEGEN_TARGETFRAMELOWERING_H 14 #define LLVM_CODEGEN_TARGETFRAMELOWERING_H 15 16 #include "llvm/ADT/BitVector.h" 17 #include "llvm/CodeGen/MachineBasicBlock.h" 18 #include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h" 19 #include "llvm/Support/Compiler.h" 20 #include "llvm/Support/TypeSize.h" 21 #include <vector> 22 23 namespace llvm { 24 class BitVector; 25 class CalleeSavedInfo; 26 class MachineFunction; 27 class RegScavenger; 28 29 namespace TargetStackID { 30 enum Value { 31 Default = 0, 32 SGPRSpill = 1, 33 ScalableVector = 2, 34 WasmLocal = 3, 35 NoAlloc = 255 36 }; 37 } 38 39 /// Information about stack frame layout on the target. It holds the direction 40 /// of stack growth, the known stack alignment on entry to each function, and 41 /// the offset to the locals area. 42 /// 43 /// The offset to the local area is the offset from the stack pointer on 44 /// function entry to the first location where function data (local variables, 45 /// spill locations) can be stored. 46 class LLVM_ABI TargetFrameLowering { 47 public: 48 enum StackDirection { 49 StackGrowsUp, // Adding to the stack increases the stack address 50 StackGrowsDown // Adding to the stack decreases the stack address 51 }; 52 53 // Maps a callee saved register to a stack slot with a fixed offset. 54 struct SpillSlot { 55 unsigned Reg; 56 int64_t Offset; // Offset relative to stack pointer on function entry. 57 }; 58 59 struct DwarfFrameBase { 60 // The frame base may be either a register (the default), the CFA with an 61 // offset, or a WebAssembly-specific location description. 62 enum FrameBaseKind { Register, CFA, WasmFrameBase } Kind; 63 struct WasmFrameBase { 64 unsigned Kind; // Wasm local, global, or value stack 65 unsigned Index; 66 }; 67 union { 68 // Used with FrameBaseKind::Register. 69 unsigned Reg; 70 // Used with FrameBaseKind::CFA. 71 int64_t Offset; 72 struct WasmFrameBase WasmLoc; 73 } Location; 74 }; 75 76 private: 77 StackDirection StackDir; 78 Align StackAlignment; 79 Align TransientStackAlignment; 80 int LocalAreaOffset; 81 bool StackRealignable; 82 public: 83 TargetFrameLowering(StackDirection D, Align StackAl, int LAO, 84 Align TransAl = Align(1), bool StackReal = true) StackDir(D)85 : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl), 86 LocalAreaOffset(LAO), StackRealignable(StackReal) {} 87 88 virtual ~TargetFrameLowering(); 89 90 // These methods return information that describes the abstract stack layout 91 // of the target machine. 92 93 /// getStackGrowthDirection - Return the direction the stack grows 94 /// getStackGrowthDirection()95 StackDirection getStackGrowthDirection() const { return StackDir; } 96 97 /// getStackAlignment - This method returns the number of bytes to which the 98 /// stack pointer must be aligned on entry to a function. Typically, this 99 /// is the largest alignment for any data object in the target. 100 /// getStackAlignment()101 unsigned getStackAlignment() const { return StackAlignment.value(); } 102 /// getStackAlignment - This method returns the number of bytes to which the 103 /// stack pointer must be aligned on entry to a function. Typically, this 104 /// is the largest alignment for any data object in the target. 105 /// getStackAlign()106 Align getStackAlign() const { return StackAlignment; } 107 108 /// getStackThreshold - Return the maximum stack size 109 /// getStackThreshold()110 virtual uint64_t getStackThreshold() const { return UINT_MAX; } 111 112 /// alignSPAdjust - This method aligns the stack adjustment to the correct 113 /// alignment. 114 /// alignSPAdjust(int SPAdj)115 int alignSPAdjust(int SPAdj) const { 116 if (SPAdj < 0) { 117 SPAdj = -alignTo(-SPAdj, StackAlignment); 118 } else { 119 SPAdj = alignTo(SPAdj, StackAlignment); 120 } 121 return SPAdj; 122 } 123 124 /// getTransientStackAlignment - This method returns the number of bytes to 125 /// which the stack pointer must be aligned at all times, even between 126 /// calls. 127 /// getTransientStackAlign()128 Align getTransientStackAlign() const { return TransientStackAlignment; } 129 130 /// isStackRealignable - This method returns whether the stack can be 131 /// realigned. isStackRealignable()132 bool isStackRealignable() const { 133 return StackRealignable; 134 } 135 136 /// This method returns whether or not it is safe for an object with the 137 /// given stack id to be bundled into the local area. isStackIdSafeForLocalArea(unsigned StackId)138 virtual bool isStackIdSafeForLocalArea(unsigned StackId) const { 139 return true; 140 } 141 142 /// getOffsetOfLocalArea - This method returns the offset of the local area 143 /// from the stack pointer on entrance to a function. 144 /// getOffsetOfLocalArea()145 int getOffsetOfLocalArea() const { return LocalAreaOffset; } 146 147 /// Control the placement of special register scavenging spill slots when 148 /// allocating a stack frame. 149 /// 150 /// If this returns true, the frame indexes used by the RegScavenger will be 151 /// allocated closest to the incoming stack pointer. 152 virtual bool allocateScavengingFrameIndexesNearIncomingSP( 153 const MachineFunction &MF) const; 154 155 /// assignCalleeSavedSpillSlots - Allows target to override spill slot 156 /// assignment logic. If implemented, assignCalleeSavedSpillSlots() should 157 /// assign frame slots to all CSI entries and return true. If this method 158 /// returns false, spill slots will be assigned using generic implementation. 159 /// assignCalleeSavedSpillSlots() may add, delete or rearrange elements of 160 /// CSI. assignCalleeSavedSpillSlots(MachineFunction & MF,const TargetRegisterInfo * TRI,std::vector<CalleeSavedInfo> & CSI,unsigned & MinCSFrameIndex,unsigned & MaxCSFrameIndex)161 virtual bool assignCalleeSavedSpillSlots(MachineFunction &MF, 162 const TargetRegisterInfo *TRI, 163 std::vector<CalleeSavedInfo> &CSI, 164 unsigned &MinCSFrameIndex, 165 unsigned &MaxCSFrameIndex) const { 166 return assignCalleeSavedSpillSlots(MF, TRI, CSI); 167 } 168 169 virtual bool assignCalleeSavedSpillSlots(MachineFunction & MF,const TargetRegisterInfo * TRI,std::vector<CalleeSavedInfo> & CSI)170 assignCalleeSavedSpillSlots(MachineFunction &MF, 171 const TargetRegisterInfo *TRI, 172 std::vector<CalleeSavedInfo> &CSI) const { 173 return false; 174 } 175 176 /// getCalleeSavedSpillSlots - This method returns a pointer to an array of 177 /// pairs, that contains an entry for each callee saved register that must be 178 /// spilled to a particular stack location if it is spilled. 179 /// 180 /// Each entry in this array contains a <register,offset> pair, indicating the 181 /// fixed offset from the incoming stack pointer that each register should be 182 /// spilled at. If a register is not listed here, the code generator is 183 /// allowed to spill it anywhere it chooses. 184 /// 185 virtual const SpillSlot * getCalleeSavedSpillSlots(unsigned & NumEntries)186 getCalleeSavedSpillSlots(unsigned &NumEntries) const { 187 NumEntries = 0; 188 return nullptr; 189 } 190 191 /// targetHandlesStackFrameRounding - Returns true if the target is 192 /// responsible for rounding up the stack frame (probably at emitPrologue 193 /// time). targetHandlesStackFrameRounding()194 virtual bool targetHandlesStackFrameRounding() const { 195 return false; 196 } 197 198 /// Returns true if the target will correctly handle shrink wrapping. enableShrinkWrapping(const MachineFunction & MF)199 virtual bool enableShrinkWrapping(const MachineFunction &MF) const { 200 return false; 201 } 202 203 /// Returns true if the stack slot holes in the fixed and callee-save stack 204 /// area should be used when allocating other stack locations to reduce stack 205 /// size. enableStackSlotScavenging(const MachineFunction & MF)206 virtual bool enableStackSlotScavenging(const MachineFunction &MF) const { 207 return false; 208 } 209 210 /// Returns true if the target can safely skip saving callee-saved registers 211 /// for noreturn nounwind functions. 212 virtual bool enableCalleeSaveSkip(const MachineFunction &MF) const; 213 214 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 215 /// the function. 216 virtual void emitPrologue(MachineFunction &MF, 217 MachineBasicBlock &MBB) const = 0; 218 virtual void emitEpilogue(MachineFunction &MF, 219 MachineBasicBlock &MBB) const = 0; 220 221 /// emitZeroCallUsedRegs - Zeros out call used registers. emitZeroCallUsedRegs(BitVector RegsToZero,MachineBasicBlock & MBB)222 virtual void emitZeroCallUsedRegs(BitVector RegsToZero, 223 MachineBasicBlock &MBB) const {} 224 225 /// With basic block sections, emit callee saved frame moves for basic blocks 226 /// that are in a different section. 227 virtual void emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI)228 emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock &MBB, 229 MachineBasicBlock::iterator MBBI) const {} 230 231 /// Returns true if we may need to fix the unwind information for the 232 /// function. 233 virtual bool enableCFIFixup(const MachineFunction &MF) const; 234 235 /// enableFullCFIFixup - Returns true if we may need to fix the unwind 236 /// information such that it is accurate for *every* instruction in the 237 /// function (e.g. if the function has an async unwind table). enableFullCFIFixup(const MachineFunction & MF)238 virtual bool enableFullCFIFixup(const MachineFunction &MF) const { 239 return enableCFIFixup(MF); 240 }; 241 242 /// Emit CFI instructions that recreate the state of the unwind information 243 /// upon function entry. resetCFIToInitialState(MachineBasicBlock & MBB)244 virtual void resetCFIToInitialState(MachineBasicBlock &MBB) const {} 245 246 /// Replace a StackProbe stub (if any) with the actual probe code inline inlineStackProbe(MachineFunction & MF,MachineBasicBlock & PrologueMBB)247 virtual void inlineStackProbe(MachineFunction &MF, 248 MachineBasicBlock &PrologueMBB) const {} 249 250 /// Does the stack probe function call return with a modified stack pointer? stackProbeFunctionModifiesSP()251 virtual bool stackProbeFunctionModifiesSP() const { return false; } 252 253 /// Adjust the prologue to have the function use segmented stacks. This works 254 /// by adding a check even before the "normal" function prologue. adjustForSegmentedStacks(MachineFunction & MF,MachineBasicBlock & PrologueMBB)255 virtual void adjustForSegmentedStacks(MachineFunction &MF, 256 MachineBasicBlock &PrologueMBB) const {} 257 258 /// Adjust the prologue to add Erlang Run-Time System (ERTS) specific code in 259 /// the assembly prologue to explicitly handle the stack. adjustForHiPEPrologue(MachineFunction & MF,MachineBasicBlock & PrologueMBB)260 virtual void adjustForHiPEPrologue(MachineFunction &MF, 261 MachineBasicBlock &PrologueMBB) const {} 262 263 /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee 264 /// saved registers and returns true if it isn't possible / profitable to do 265 /// so by issuing a series of store instructions via 266 /// storeRegToStackSlot(). Returns false otherwise. spillCalleeSavedRegisters(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,ArrayRef<CalleeSavedInfo> CSI,const TargetRegisterInfo * TRI)267 virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 268 MachineBasicBlock::iterator MI, 269 ArrayRef<CalleeSavedInfo> CSI, 270 const TargetRegisterInfo *TRI) const { 271 return false; 272 } 273 274 /// spillCalleeSavedRegister - Default implementation for spilling a single 275 /// callee saved register. 276 void spillCalleeSavedRegister(MachineBasicBlock &SaveBlock, 277 MachineBasicBlock::iterator MI, 278 const CalleeSavedInfo &CS, 279 const TargetInstrInfo *TII, 280 const TargetRegisterInfo *TRI) const; 281 282 /// restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee 283 /// saved registers and returns true if it isn't possible / profitable to do 284 /// so by issuing a series of load instructions via loadRegToStackSlot(). 285 /// If it returns true, and any of the registers in CSI is not restored, 286 /// it sets the corresponding Restored flag in CSI to false. 287 /// Returns false otherwise. 288 virtual bool restoreCalleeSavedRegisters(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,MutableArrayRef<CalleeSavedInfo> CSI,const TargetRegisterInfo * TRI)289 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 290 MachineBasicBlock::iterator MI, 291 MutableArrayRef<CalleeSavedInfo> CSI, 292 const TargetRegisterInfo *TRI) const { 293 return false; 294 } 295 296 // restoreCalleeSavedRegister - Default implementation for restoring a single 297 // callee saved register. Should be called in reverse order. Can insert 298 // multiple instructions. 299 void restoreCalleeSavedRegister(MachineBasicBlock &MBB, 300 MachineBasicBlock::iterator MI, 301 const CalleeSavedInfo &CS, 302 const TargetInstrInfo *TII, 303 const TargetRegisterInfo *TRI) const; 304 305 /// hasFP - Return true if the specified function should have a dedicated 306 /// frame pointer register. For most targets this is true only if the function 307 /// has variable sized allocas or if frame pointer elimination is disabled. 308 /// For all targets, this is false if the function has the naked attribute 309 /// since there is no prologue to set up the frame pointer. hasFP(const MachineFunction & MF)310 bool hasFP(const MachineFunction &MF) const { 311 return !MF.getFunction().hasFnAttribute(Attribute::Naked) && hasFPImpl(MF); 312 } 313 314 /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is 315 /// not required, we reserve argument space for call sites in the function 316 /// immediately on entry to the current function. This eliminates the need for 317 /// add/sub sp brackets around call sites. Returns true if the call frame is 318 /// included as part of the stack frame. hasReservedCallFrame(const MachineFunction & MF)319 virtual bool hasReservedCallFrame(const MachineFunction &MF) const { 320 return !hasFP(MF); 321 } 322 323 /// canSimplifyCallFramePseudos - When possible, it's best to simplify the 324 /// call frame pseudo ops before doing frame index elimination. This is 325 /// possible only when frame index references between the pseudos won't 326 /// need adjusting for the call frame adjustments. Normally, that's true 327 /// if the function has a reserved call frame or a frame pointer. Some 328 /// targets (Thumb2, for example) may have more complicated criteria, 329 /// however, and can override this behavior. canSimplifyCallFramePseudos(const MachineFunction & MF)330 virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const { 331 return hasReservedCallFrame(MF) || hasFP(MF); 332 } 333 334 // needsFrameIndexResolution - Do we need to perform FI resolution for 335 // this function. Normally, this is required only when the function 336 // has any stack objects. However, targets may want to override this. 337 virtual bool needsFrameIndexResolution(const MachineFunction &MF) const; 338 339 /// getFrameIndexReference - This method should return the base register 340 /// and offset used to reference a frame index location. The offset is 341 /// returned directly, and the base register is returned via FrameReg. 342 virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, 343 Register &FrameReg) const; 344 345 /// Same as \c getFrameIndexReference, except that the stack pointer (as 346 /// opposed to the frame pointer) will be the preferred value for \p 347 /// FrameReg. This is generally used for emitting statepoint or EH tables that 348 /// use offsets from RSP. If \p IgnoreSPUpdates is true, the returned 349 /// offset is only guaranteed to be valid with respect to the value of SP at 350 /// the end of the prologue. 351 virtual StackOffset getFrameIndexReferencePreferSP(const MachineFunction & MF,int FI,Register & FrameReg,bool IgnoreSPUpdates)352 getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, 353 Register &FrameReg, 354 bool IgnoreSPUpdates) const { 355 // Always safe to dispatch to getFrameIndexReference. 356 return getFrameIndexReference(MF, FI, FrameReg); 357 } 358 359 /// getNonLocalFrameIndexReference - This method returns the offset used to 360 /// reference a frame index location. The offset can be from either FP/BP/SP 361 /// based on which base register is returned by llvm.localaddress. getNonLocalFrameIndexReference(const MachineFunction & MF,int FI)362 virtual StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF, 363 int FI) const { 364 // By default, dispatch to getFrameIndexReference. Interested targets can 365 // override this. 366 Register FrameReg; 367 return getFrameIndexReference(MF, FI, FrameReg); 368 } 369 370 /// getFrameIndexReferenceFromSP - This method returns the offset from the 371 /// stack pointer to the slot of the specified index. This function serves to 372 /// provide a comparable offset from a single reference point (the value of 373 /// the stack-pointer at function entry) that can be used for analysis. 374 virtual StackOffset getFrameIndexReferenceFromSP(const MachineFunction &MF, 375 int FI) const; 376 377 /// Returns the callee-saved registers as computed by determineCalleeSaves 378 /// in the BitVector \p SavedRegs. 379 virtual void getCalleeSaves(const MachineFunction &MF, 380 BitVector &SavedRegs) const; 381 382 /// This method determines which of the registers reported by 383 /// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved. 384 /// The default implementation checks populates the \p SavedRegs bitset with 385 /// all registers which are modified in the function, targets may override 386 /// this function to save additional registers. 387 /// This method also sets up the register scavenger ensuring there is a free 388 /// register or a frameindex available. 389 /// This method should not be called by any passes outside of PEI, because 390 /// it may change state passed in by \p MF and \p RS. The preferred 391 /// interface outside PEI is getCalleeSaves. 392 virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 393 RegScavenger *RS = nullptr) const; 394 395 /// processFunctionBeforeFrameFinalized - This method is called immediately 396 /// before the specified function's frame layout (MF.getFrameInfo()) is 397 /// finalized. Once the frame is finalized, MO_FrameIndex operands are 398 /// replaced with direct constants. This method is optional. 399 /// 400 virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF, 401 RegScavenger *RS = nullptr) const { 402 } 403 404 /// processFunctionBeforeFrameIndicesReplaced - This method is called 405 /// immediately before MO_FrameIndex operands are eliminated, but after the 406 /// frame is finalized. This method is optional. 407 virtual void 408 processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, 409 RegScavenger *RS = nullptr) const {} 410 getWinEHParentFrameOffset(const MachineFunction & MF)411 virtual unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const { 412 report_fatal_error("WinEH not implemented for this target"); 413 } 414 415 /// This method is called during prolog/epilog code insertion to eliminate 416 /// call frame setup and destroy pseudo instructions (but only if the Target 417 /// is using them). It is responsible for eliminating these instructions, 418 /// replacing them with concrete instructions. This method need only be 419 /// implemented if using call frame setup/destroy pseudo instructions. 420 /// Returns an iterator pointing to the instruction after the replaced one. 421 virtual MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction & MF,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI)422 eliminateCallFramePseudoInstr(MachineFunction &MF, 423 MachineBasicBlock &MBB, 424 MachineBasicBlock::iterator MI) const { 425 llvm_unreachable("Call Frame Pseudo Instructions do not exist on this " 426 "target!"); 427 } 428 429 430 /// Order the symbols in the local stack frame. 431 /// The list of objects that we want to order is in \p objectsToAllocate as 432 /// indices into the MachineFrameInfo. The array can be reordered in any way 433 /// upon return. The contents of the array, however, may not be modified (i.e. 434 /// only their order may be changed). 435 /// By default, just maintain the original order. 436 virtual void orderFrameObjects(const MachineFunction & MF,SmallVectorImpl<int> & objectsToAllocate)437 orderFrameObjects(const MachineFunction &MF, 438 SmallVectorImpl<int> &objectsToAllocate) const { 439 } 440 441 /// Check whether or not the given \p MBB can be used as a prologue 442 /// for the target. 443 /// The prologue will be inserted first in this basic block. 444 /// This method is used by the shrink-wrapping pass to decide if 445 /// \p MBB will be correctly handled by the target. 446 /// As soon as the target enable shrink-wrapping without overriding 447 /// this method, we assume that each basic block is a valid 448 /// prologue. canUseAsPrologue(const MachineBasicBlock & MBB)449 virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const { 450 return true; 451 } 452 453 /// Check whether or not the given \p MBB can be used as a epilogue 454 /// for the target. 455 /// The epilogue will be inserted before the first terminator of that block. 456 /// This method is used by the shrink-wrapping pass to decide if 457 /// \p MBB will be correctly handled by the target. 458 /// As soon as the target enable shrink-wrapping without overriding 459 /// this method, we assume that each basic block is a valid 460 /// epilogue. canUseAsEpilogue(const MachineBasicBlock & MBB)461 virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const { 462 return true; 463 } 464 465 /// Returns the StackID that scalable vectors should be associated with. getStackIDForScalableVectors()466 virtual TargetStackID::Value getStackIDForScalableVectors() const { 467 return TargetStackID::Default; 468 } 469 isSupportedStackID(TargetStackID::Value ID)470 virtual bool isSupportedStackID(TargetStackID::Value ID) const { 471 switch (ID) { 472 default: 473 return false; 474 case TargetStackID::Default: 475 case TargetStackID::NoAlloc: 476 return true; 477 } 478 } 479 480 /// Check if given function is safe for not having callee saved registers. 481 /// This is used when interprocedural register allocation is enabled. 482 static bool isSafeForNoCSROpt(const Function &F); 483 484 /// Check if the no-CSR optimisation is profitable for the given function. isProfitableForNoCSROpt(const Function & F)485 virtual bool isProfitableForNoCSROpt(const Function &F) const { 486 return true; 487 } 488 489 /// Return initial CFA offset value i.e. the one valid at the beginning of the 490 /// function (before any stack operations). 491 virtual int getInitialCFAOffset(const MachineFunction &MF) const; 492 493 /// Return initial CFA register value i.e. the one valid at the beginning of 494 /// the function (before any stack operations). 495 virtual Register getInitialCFARegister(const MachineFunction &MF) const; 496 497 /// Return the frame base information to be encoded in the DWARF subprogram 498 /// debug info. 499 virtual DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const; 500 501 /// If frame pointer or base pointer is clobbered by an instruction, we should 502 /// spill/restore it around that instruction. spillFPBP(MachineFunction & MF)503 virtual void spillFPBP(MachineFunction &MF) const {} 504 505 /// This method is called at the end of prolog/epilog code insertion, so 506 /// targets can emit remarks based on the final frame layout. emitRemarks(const MachineFunction & MF,MachineOptimizationRemarkEmitter * ORE)507 virtual void emitRemarks(const MachineFunction &MF, 508 MachineOptimizationRemarkEmitter *ORE) const {}; 509 510 protected: 511 virtual bool hasFPImpl(const MachineFunction &MF) const = 0; 512 }; 513 514 } // End llvm namespace 515 516 #endif 517