| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoM.td | 39 def MULHU : ALU_rr<0b0000001, 0b011, "mulhu", Commutable=1>, 77 def : PatGprGpr<mulhu, MULHU>;
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| H A D | RISCVSchedSpacemitX60.td | 68 // The latency of mul is 5, while in mulh, mulhsu, mulhu is 6
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| H A D | RISCVInstrInfoVSDPatterns.td | 1067 defm : VPatBinarySDNode_VV_VX<mulhu, "PseudoVMULHU", IntegerVectorsExceptI64>; 1071 defm : VPatBinarySDNode_VV_VX<mulhu, "PseudoVMULHU", I64IntegerVectors>;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | KnownBits.h | 391 LLVM_ABI static KnownBits mulhu(const KnownBits &LHS, const KnownBits &RHS);
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/ |
| H A D | SelectionDAGCompat.td | 67 def : GINodeEquiv<G_UMULH, mulhu>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips64r6InstrInfo.td | 73 class DMUHU_DESC : MUL_R6_DESC_BASE<"dmuhu", GPR64Opnd, II_DMUHU, mulhu>;
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| H A D | Mips32r6InstrInfo.td | 607 class MUHU_DESC : MUL_R6_DESC_BASE<"muhu", GPR32Opnd, II_MUHU, mulhu>;
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| H A D | MicroMips32r6InstrInfo.td | 354 class MUHU_MMR6_DESC : ArithLogicR<"muhu", GPR32Opnd, 1, II_MUHU, mulhu>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatternsHVX.td | 937 def: Pat<(VecI8 (mulhu HVI8:$Vu, HVI8:$Vv)), 940 def: Pat<(VecI16 (mulhu HVI16:$Vu, HVI16:$Vv)), 944 def: Pat<(VecI16 (mulhu HVI16:$Vu, HVI16:$Vv)),
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| H A D | HexagonPatterns.td | 1576 def: OpR_RR_pat<M2_mpyu_up, pf2<mulhu>, i32, I32>; 1641 def: Pat<(v2i32 (mulhu V2I32:$Rss, V2I32:$Rtt)), 1661 def: Pat<(v4i8 (mulhu V4I8:$Rs, V4I8:$Rt)), (Mulhub4 $Rs, $Rt)>; 1662 def: Pat<(v8i8 (mulhu V8I8:$Rss, V8I8:$Rtt)), (Mulhub8 $Rss, $Rtt)>; 1691 def: Pat<(v2i16 (mulhu V2I16:$Rs, V2I16:$Rt)), 1699 def: Pat<(v4i16 (mulhu V4I16:$Rss, V4I16:$Rtt)), 1832 def : Pat <(mulhu I64:$Rss, I64:$Rtt), (MulHU $Rss, $Rtt)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrVIS.td | 310 def : Pat<(i64 (mulhu i64:$lhs, i64:$rhs)), (UMULXHI $lhs, $rhs)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrArithmetic.td | 746 def : Pat<(mulhu i16:$dst, i16:$opd), 765 def : Pat<(mulhu i16:$dst, Mxi16immSExt16:$opd),
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| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | KnownBits.cpp | 909 KnownBits KnownBits::mulhu(const KnownBits &LHS, const KnownBits &RHS) { in mulhu() function in KnownBits
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| H A D | APInt.cpp | 3131 APInt APIntOps::mulhu(const APInt &C1, const APInt &C2) { in mulhu() function in APIntOps
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrVector.td | 797 def VMLHB : BinaryVRRc<"vmlhb", 0xE7A1, mulhu, v128b, v128b, 0>; 798 def VMLHH : BinaryVRRc<"vmlhh", 0xE7A1, mulhu, v128h, v128h, 1>; 799 def VMLHF : BinaryVRRc<"vmlhf", 0xE7A1, mulhu, v128f, v128f, 2>; 801 def VMLHG : BinaryVRRc<"vmlhg", 0xE7A1, mulhu, v128g, v128g, 3>; 802 def VMLHQ : BinaryVRRc<"vmlhq", 0xE7A1, mulhu, v128q, v128q, 4>;
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| /freebsd/sys/riscv/include/ |
| H A D | encoding.h | 814 DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | APInt.h | 2295 LLVM_ABI APInt mulhu(const APInt &C1, const APInt &C2);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 328 defm : MultiPat<mulhu, MPYMU_rrr, MPYMU_rru6, MPYMU_rrlimm>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrP10.td | 1776 [(set v4i32:$VD, (mulhu v4i32:$VA, v4i32:$VB))]>; 1782 [(set v2i64:$VD, (mulhu v2i64:$VA, v2i64:$VB))]>;
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| H A D | PPCInstr64Bit.td | 880 [(set i64:$RT, (mulhu i64:$RA, i64:$RB))]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.td | 1192 def : PatGprGpr<mulhu, MULH_WU>; 1230 def : PatGprGpr<mulhu, MULH_DU>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600Instructions.td | 1146 inst, "MULHI", mulhu> {
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| H A D | VOP3Instructions.td | 171 defm V_MUL_HI_U32 : VOP3Inst <"v_mul_hi_u32", V_MUL_PROF<VOP_I32_I32_I32>, mulhu>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaInstrInfo.td | 1004 def MULUH : ArithLogic_RRR<0x0A, 0x02, "muluh", mulhu, 1>, Requires<[HasMul32High]>;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 415 def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>;
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