| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoM.td | 34 def MULHU : ALU_rr<0b0000001, 0b011, "mulhu", Commutable=1>,
72 def : PatGprGpr<mulhu, MULHU>;
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| H A D | RISCVInstrInfoVSDPatterns.td | 1068 defm : VPatBinarySDNode_VV_VX<mulhu, "PseudoVMULHU", IntegerVectorsExceptI64>;
1072 defm : VPatBinarySDNode_VV_VX<mulhu, "PseudoVMULHU", I64IntegerVectors>;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | KnownBits.h | 364 static KnownBits mulhu(const KnownBits &LHS, const KnownBits &RHS);
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/ |
| H A D | SelectionDAGCompat.td | 66 def : GINodeEquiv<G_UMULH, mulhu>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips64r6InstrInfo.td | 73 class DMUHU_DESC : MUL_R6_DESC_BASE<"dmuhu", GPR64Opnd, II_DMUHU, mulhu>;
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| H A D | Mips32r6InstrInfo.td | 607 class MUHU_DESC : MUL_R6_DESC_BASE<"muhu", GPR32Opnd, II_MUHU, mulhu>;
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| H A D | MicroMips32r6InstrInfo.td | 354 class MUHU_MMR6_DESC : ArithLogicR<"muhu", GPR32Opnd, 1, II_MUHU, mulhu>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatternsHVX.td | 922 def: Pat<(VecI8 (mulhu HVI8:$Vu, HVI8:$Vv)),
925 def: Pat<(VecI16 (mulhu HVI16:$Vu, HVI16:$Vv)),
929 def: Pat<(VecI16 (mulhu HVI16:$Vu, HVI16:$Vv)),
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| H A D | HexagonPatterns.td | 1543 def: OpR_RR_pat<M2_mpyu_up, pf2<mulhu>, i32, I32>;
1608 def: Pat<(v2i32 (mulhu V2I32:$Rss, V2I32:$Rtt)),
1628 def: Pat<(v4i8 (mulhu V4I8:$Rs, V4I8:$Rt)), (Mulhub4 $Rs, $Rt)>;
1629 def: Pat<(v8i8 (mulhu V8I8:$Rss, V8I8:$Rtt)), (Mulhub8 $Rss, $Rtt)>;
1658 def: Pat<(v2i16 (mulhu V2I16:$Rs, V2I16:$Rt)),
1666 def: Pat<(v4i16 (mulhu V4I16:$Rss, V4I16:$Rtt)),
1799 def : Pat <(mulhu I64:$Rss, I64:$Rtt), (MulHU $Rss, $Rtt)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrArithmetic.td | 746 def : Pat<(mulhu i16:$dst, i16:$opd),
765 def : Pat<(mulhu i16:$dst, Mxi16immSExt16:$opd),
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| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | KnownBits.cpp | 902 KnownBits KnownBits::mulhu(const KnownBits &LHS, const KnownBits &RHS) { in mulhu() function in KnownBits
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| H A D | APInt.cpp | 3100 APInt APIntOps::mulhu(const APInt &C1, const APInt &C2) { in mulhu() function in APIntOps
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| /freebsd/sys/riscv/include/ |
| H A D | encoding.h | 814 DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | APInt.h | 2244 APInt mulhu(const APInt &C1, const APInt &C2);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 329 defm : MultiPat<mulhu, MPYMU_rrr, MPYMU_rru6, MPYMU_rrlimm>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.td | 1128 def : PatGprGpr<mulhu, MULH_WU>;
1161 def : PatGprGpr<mulhu, MULH_DU>;
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| H A D | LoongArchLASXInstrInfo.td | 1294 defm : PatXrXrU<mulhu, "XVMUH">;
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| H A D | LoongArchLSXInstrInfo.td | 1416 defm : PatVrVrU<mulhu, "VMUH">;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrP10.td | 1770 [(set v4i32:$VD, (mulhu v4i32:$VA, v4i32:$VB))]>;
1776 [(set v2i64:$VD, (mulhu v2i64:$VA, v2i64:$VB))]>;
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| H A D | PPCInstr64Bit.td | 880 [(set i64:$RT, (mulhu i64:$RA, i64:$RB))]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600Instructions.td | 1146 inst, "MULHI", mulhu> {
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| H A D | VOP3Instructions.td | 162 defm V_MUL_HI_U32 : VOP3Inst <"v_mul_hi_u32", V_MUL_PROF<VOP_I32_I32_I32>, mulhu>;
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| H A D | SOPInstructions.td | 869 [(set i32:$sdst, (UniformBinFrag<mulhu> SSrc_b32:$src0, SSrc_b32:$src1))]>;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 402 def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>;
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 3463 Known = KnownBits::mulhu(Known, Known2); in computeKnownBits()
3499 Known = KnownBits::mulhu(Known, Known2); in computeKnownBits()
6307 return APIntOps::mulhu(C1, C2); in FoldValue()
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