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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dsnps,dw-axi-dmac.txt9 - snps,dma-masters: Number of AXI masters supported by the hardware.
34 snps,dma-masters = <2>;
H A Dsnps-dma.txt9 - dma-masters: Number of AHB masters supported by the controller
43 dma-masters = <2>;
H A Dlpc1850-dmamux.txt12 - dma-masters: phandle pointing to the DMA controller
41 dma-masters = <&dmac>;
H A Dti-dma-crossbar.txt10 - dma-masters: phandle pointing to the DMA controller
55 dma-masters = <&sdma>;
/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A Diommu.txt49 association of masters to be configured. Note that an IOMMU can by design
56 - #iommu-cells = <4>: Some IOMMU devices allow the DMA window for masters to
70 Devices that access memory through an IOMMU are called masters. A device can
91 - pasid-num-bits: Some masters support multiple address spaces for DMA, by
105 Firmware has to opt-in stalling, because most buses and masters don't
108 won't work in systems and masters that haven't been designed for
148 * have sufficient information to distinguish between masters.
151 * all masters at any given point in time.
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dbrcm,gisb-arb.txt19 masters are valid at the system level
21 masters. Should match the number of bits set in brcm,gisb-master-mask and
H A Dti,da850-mstpri.txt5 peripherals classified as masters.
/freebsd/sys/contrib/device-tree/Bindings/fsi/
H A Dfsi.txt11 FSI masters may require their own DT nodes (to describe the master HW itself);
15 Under the masters' nodes, we can describe the bus topology using nodes to
43 FSI masters
62 masters that may be present on the bus.
H A Dfsi-master-gpio.txt13 functions (eg, external FSI masters)
H A Dfsi-master-aspeed.txt4 The AST2600 contains two identical FSI masters. They share a clock and have a
H A Dfsi-master-ast-cf.txt15 functions (eg, external FSI masters)
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-demux-pinctrl.txt25 - i2c-parent: List of phandles of I2C masters available for selection. The first
134 - the i2c masters must have their status "disabled". This driver will
H A Di2c-arb-gpio-challenge.txt13 * Having two masters on a bus in general makes it relatively hard to debug
20 All masters on the bus have a 'bus claim' line which is an output that the
H A Di2c-gate.txt4 there are no competing masters to consider for gates and therefore there is
H A Di2c-qcom-cci.txt46 The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996,
/freebsd/contrib/unbound/services/
H A Dauthzone.h327 struct auth_master* masters; member
381 struct auth_master* masters; member
/freebsd/sys/contrib/device-tree/Bindings/virtio/
H A Dmmio.txt14 linked to DMA masters using the "iommus" or "iommu-map"
H A Diommu.txt6 masters. Therefore, the PCI root complex that hosts the virtio-iommu
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dmcp320x.txt45 masters support it.
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear13xx.dtsi113 dma-masters = <2>;
126 dma-masters = <2>;
/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr9a06g032.dtsi116 dma-masters = <&dma0 &dma1>;
299 dma-masters = <1>;
313 dma-masters = <1>;
/freebsd/sys/contrib/device-tree/Bindings/riscv/
H A Dsifive-l2-cache.txt4 of memory for masters in a Core Complex. The Level 2 Cache Controller also
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dcci.txt124 * CCI interconnect bus masters
126 Description: masters in the device tree connected to a CCI port
/freebsd/sys/dts/arm/
H A Dzedboard.dts35 // First megabyte isn't accessible by all interconnect masters.
H A Dzybo.dts35 // First megabyte isn't accessible by all interconnect masters.

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