Searched refs:m_SpecificICst (Results 1 – 7 of 7) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerCombiner.cpp | 264 return mi_match(Merge.getSourceReg(1), MRI, m_SpecificICst(0)); in matchFoldMergeToZext()
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H A D | AArch64PreLegalizerCombiner.cpp | 93 !mi_match(RHS, MRI, m_SpecificICst(0))) in matchICmpRedundantTrunc()
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H A D | AArch64InstructionSelector.cpp | 1247 m_any_of(m_GAdd(m_Reg(MatchReg), m_SpecificICst(1)), in emitSelect() 1248 m_GPtrAdd(m_Reg(MatchReg), m_SpecificICst(1))))) { in emitSelect()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MIPatternMatch.h | 195 inline SpecificConstantMatch m_SpecificICst(int64_t RequestedValue) { in m_SpecificICst() function
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | Utils.cpp | 1381 return mi_match(SplatValAndReg->VReg, MRI, m_SpecificICst(SplatValue)); in isBuildVectorConstantSplat()
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H A D | CombinerHelper.cpp | 4443 if (!mi_match(MI.getOperand(3).getReg(), MRI, m_SpecificICst(OneOrZero))) in matchICmpToLHSKnownBits()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.cpp | 735 Src0, *MRI, m_OneUse(m_GLShr(m_Reg(ShiftSrc0), m_SpecificICst(16)))); in selectG_BUILD_VECTOR() 738 Src1, *MRI, m_OneUse(m_GLShr(m_Reg(ShiftSrc1), m_SpecificICst(16)))); in selectG_BUILD_VECTOR() 2494 m_GTrunc(m_GLShr(m_Reg(LShlSrc), m_SpecificICst(16))))) { in isExtractHiElt()
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