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/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dmax8952.txt20 - 0: 32mV/us
21 - 1: 16mV/us
22 - 2: 8mV/us
23 - 3: 4mV/us
24 - 4: 2mV/us
25 - 5: 1mV/us
26 - 6: 0.5mV/us
27 - 7: 0.25mV/us
28 Defaults to 32mV/us if not specified.
H A Dtps51632-regulator.txt9 - ti,dvfs-step-20mV: The 20mV step voltage when PWM DVFS enabled. Missing this
10 will set 10mV step voltage in PWM DVFS mode. In normal mode, the voltage
11 step is 10mV as per datasheet.
26 ti,dvfs-step-20mV;
H A Dnvidia,tegra-regulators-coupling.txt12 The CORE and RTC voltages shall be in a range of 170mV from each other
13 and they both shall be higher than the CPU voltage by at least 120mV.
19 and CPU voltages shall be in a range of 300mV from each other and CORE
20 voltage shall be higher than the CPU by N mV, where N depends on the CPU
H A Dltc3676.txt21 412.5mV to 800mV in 12.5 mV steps. The output voltage thus ranges between
H A Dregulator-max77620.txt112 SD: 13.75mV/us, 27.5mV/us, 55mV/us
113 LDOs: 5mV/us, 100mV/us
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dcs35l33.txt22 0, then VBST = VP. If greater than 0, the boost voltage will be 3300mV with
23 a value of 1 and will increase at a step size of 100mV until a maximum of
24 8000mV.
62 stage enters LDO operation. Starts as a default value of 50mV for a value
63 of 1 and increases with a step size of 50mV to a maximum of 750mV (value of
80 The reference voltage starts at 3000mV with a value of 0x3 and is increased
81 by 100mV per step to a maximum of 5500mV.
91 1800mV with a step size of 50mV up to a maximum value of 1750mV.
92 Default is 1800mV.
109 cirrus,boost-ctl = <0x30>; /* VBST = 8000mV */
H A Dcs35l36.txt14 converter's output voltage in mV. The range is from 2550mV to 12000mV with
15 increments of 50mV.
75 weak-FET operation. The range is 50mV to 700mV in 50mV increments.
H A Dda7213.txt13 - dlg,micbias1-lvl : Voltage (mV) for Mic Bias 1
15 - dlg,micbias2-lvl : Voltage (mV) for Mic Bias 2
H A Dda7219.txt32 - dlg,micbias-lvl : Voltage (mV) for Mic Bias
38 - dlg,ldo-lvl : Required internal LDO voltage (mV) level for digital engine
46 - dlg,micbias-pulse-lvl : Mic bias higher voltage pulse level (mV).
H A Dqcom,msm8916-wcd-analog.txt35 - qcom,mbhc-vthreshold-low: Array of 5 threshold voltages in mV for 5 buttons
38 - qcom,mbhc-vthreshold-high: Array of 5 thresold voltages in mV for 5 buttons
41 - qcom,micbias-lvl: Voltage (mV) for Mic Bias
H A Dcs35l34.txt14 converter's output voltage in mV. The range is from VP to 8V with
15 increments of 100mV.
H A Dcs35l35.txt56 converter's output voltage in mV. The range is from 2600mV to 9000mV with
57 increments of 100mV.
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmscc-phy-vsc8531.txt4 - vsc8531,vddmac : The vddmac in mV. Allowed values is listed
42 | 3300 mV 2500 mV 1800 mV 1500 mV |
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dipq9574-rdp449.dts
H A Dipq9574-rdp453.dts
H A Dipq9574-rdp454.dts
H A Dipq9574-rdp433.dts
H A Dipq9574-rdp418.dts
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dnuvoton-nau7802.txt9 configured valid values are between 2400 mV and 4500 mV.
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-spi-slot.txt11 slot voltage (mV), second cell specifies maximum slot voltage (mV).
H A Dfsl-esdhc.txt37 slot voltage (mV), second cell specifies maximum slot voltage (mV).
/freebsd/sys/contrib/device-tree/Bindings/power/supply/
H A Dmax17042_battery.txt23 as dead (in mV).
25 as over voltage (in mV).
H A Dbq2415x.txt20 - ti,weak-battery-voltage: integer, weak battery voltage threshold in mV.
23 - ti,battery-regulation-voltage: integer, maximum charging voltage in mV.
H A Dti,bq24735.txt20 must be between 1.024V and 19.2V with a 16mV step resolution. The POR value
21 is 0x0000h. This number is in mV (e.g. 19200), see spec for more information
/freebsd/sys/x86/cpufreq/
H A Dest.c85 #define ID16(MHz, mV, bus_clk) \ argument
86 (((MHz / bus_clk) << 8) | ((mV ? mV - 700 : 0) >> 4))
91 #define FREQ_INFO_PWR(MHz, mV, bus_clk, mW) \ argument
92 { MHz, mV, ID16(MHz, mV, bus_clk), mW }
93 #define FREQ_INFO(MHz, mV, bus_clk) \ argument
94 FREQ_INFO_PWR(MHz, mV, bus_clk, CPUFREQ_VAL_UNKNOWN)

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