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Searched refs:m2s_q (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma_debug.c216 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], cfg); in al_udma_regs_m2s_q_print()
217 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], status); in al_udma_regs_m2s_q_print()
218 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], tdrbp_low); in al_udma_regs_m2s_q_print()
219 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], tdrbp_high); in al_udma_regs_m2s_q_print()
220 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], tdrl); in al_udma_regs_m2s_q_print()
221 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], tdrhp); in al_udma_regs_m2s_q_print()
222 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], tdrtp); in al_udma_regs_m2s_q_print()
223 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], tdcp); in al_udma_regs_m2s_q_print()
224 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], tcrbp_low); in al_udma_regs_m2s_q_print()
225 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, m2s_q[qid], tcrbp_high); in al_udma_regs_m2s_q_print()
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H A Dal_hal_udma_config.c819 struct udma_rlimit_common *rlimit_regs = &udma_q->q_regs->m2s_q.rlimit; in al_udma_m2s_q_rlimit_set()
827 struct udma_rlimit_common *rlimit_regs = &udma_q->q_regs->m2s_q.rlimit; in al_udma_m2s_q_rlimit_act()
842 uint32_t reg = al_reg_read32(&udma_q->q_regs->m2s_q.dwrr_cfg_1); in al_udma_m2s_q_sc_set()
851 al_reg_write32(&udma_q->q_regs->m2s_q.dwrr_cfg_1, reg); in al_udma_m2s_q_sc_set()
853 reg = al_reg_read32(&udma_q->q_regs->m2s_q.dwrr_cfg_2); in al_udma_m2s_q_sc_set()
859 al_reg_write32(&udma_q->q_regs->m2s_q.dwrr_cfg_2, reg); in al_udma_m2s_q_sc_set()
861 reg = al_reg_read32(&udma_q->q_regs->m2s_q.dwrr_cfg_3); in al_udma_m2s_q_sc_set()
864 al_reg_write32(&udma_q->q_regs->m2s_q.dwrr_cfg_3, reg); in al_udma_m2s_q_sc_set()
871 uint32_t reg = al_reg_read32(&udma_q->q_regs->m2s_q.dwrr_cfg_1); in al_udma_m2s_q_sc_pause()
877 al_reg_write32(&udma_q->q_regs->m2s_q.dwrr_cfg_1, reg); in al_udma_m2s_q_sc_pause()
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H A Dal_hal_udma_main.c113 reg_addr = &udma_q->q_regs->m2s_q.rlimit.mask; in al_udma_q_config()
136 reg_addr = &udma_q->q_regs->m2s_q.comp_cfg; in al_udma_q_config_compl()
312 &udma->udma_regs->m2s.m2s_q[qid]; in al_udma_q_init()
428 q_sw_ctrl_reg = &udma_q->q_regs->m2s_q.q_sw_ctrl; in al_udma_q_reset()
H A Dal_hal_udma_regs.h95 struct udma_m2s_q m2s_q; member
H A Dal_hal_udma_regs_m2s.h355 struct udma_m2s_q m2s_q[4]; /* [0x1000] */ member