| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFormMemoryClauses.cpp | 356 if (!LI.liveAt(ClauseLiveOutIdx)) { in run()
363 if (SR.liveAt(ClauseLiveInIdx) && !SR.liveAt(ClauseLiveOutIdx)) in run()
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| H A D | SILowerWWMCopies.cpp | 95 return LR.liveAt(Idx); in isSCCLiveAtMI()
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| H A D | GCNRegPressure.cpp | 443 if ((S.LaneMask & LaneMaskFilter).any() && S.liveAt(SI)) { in getLiveLaneMask()
447 } else if (LI.liveAt(SI)) { in getLiveLaneMask()
620 if (!S.liveAt(SI)) { in advanceBeforeNext()
633 } else if (!LI.liveAt(SI)) { in advanceBeforeNext()
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| H A D | GCNSchedStrategy.cpp | 1689 if (!SR.liveAt(RematIdx)) in allUsesAvailableAt()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | VirtRegMap.cpp | 464 assert(LI.liveAt(BaseIndex) && in readsUndefSubreg()
471 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
599 if (UnitRange.liveAt(AfterMIDefs) && UnitRange.liveAt(BeforeMIUses)) in subRegLiveThrough()
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| H A D | RegisterCoalescer.cpp | 1242 if (!IntB.liveAt(UseIdx)) in removePartialRedundancy()
1371 if (LR.liveAt(CopyIdx)) in reMaterializeTrivialDef()
1582 if (!SR.liveAt(DefIndex)) in reMaterializeTrivialDef()
1751 if (SR.liveAt(Idx)) in eliminateUndefCopy()
1754 } else if (SrcLI.liveAt(Idx)) in eliminateUndefCopy()
1767 if (((V && V->isPHIDef()) || (!V && !DstLI.liveAt(Idx)))) { in eliminateUndefCopy()
1821 if (SR.liveAt(UseIdx)) { in eliminateUndefCopy()
1827 isLive = DstLI.liveAt(UseIdx); in eliminateUndefCopy()
1856 if (S.liveAt(UseIdx)) { in addUndefFlag()
1915 Reads = DstInt->liveAt(LIS->getInstructionIndex(*UseMI)); in updateRegDefsUses()
[all …]
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| H A D | RenameIndependentSubregs.cpp | 299 if (SR.liveAt(Pos)) in subRangeLiveAt()
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| H A D | LiveRangeEdit.cpp | 146 if (!SR.liveAt(UseIdx)) in allUsesAvailableAt()
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| H A D | SplitKit.cpp | 659 if (S.liveAt(UseIdx)) in defFromParent()
1304 if (PSR.liveAt(LastUse)) in extendPHIRange()
1399 if (!Edit->getParent().liveAt(Idx.getPrevSlot())) in rewriteAssigned()
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| H A D | RegisterPressure.cpp | 452 return LR.liveAt(Pos); in getLiveLanesAt()
1239 return LR.liveAt(Pos); in getLiveLanesAt()
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| H A D | MachineBasicBlock.cpp | 1332 if (!LI.liveAt(PrevIndex)) in SplitCriticalEdge()
1335 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ)); in SplitCriticalEdge()
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| H A D | PHIElimination.cpp | 863 if (LI.liveAt(LIS->getMBBStartIdx(SI))) in isLiveOutPastPHIs()
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| H A D | RegAllocGreedy.cpp | 1395 if (VirtReg.liveAt(LIS->getInstructionIndex(Instr).getRegSlot())) in trySplitAroundHintReg()
1534 if (S.liveAt(Use)) in readsLaneSubset()
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| H A D | MachineVerifier.cpp | 2820 if (loads && !LI.liveAt(Idx.getRegSlot(true))) { in visitMachineOperand()
2824 if (stores && !LI.liveAt(Idx.getRegSlot())) { in visitMachineOperand()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveIntervals.h | 267 return LR.liveAt(getMBBStartIdx(mbb)); in isLiveInToMBB()
271 return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot()); in isLiveOutOfMBB()
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| H A D | LiveInterval.h | 403 bool liveAt(SlotIndex index) const { in liveAt() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyMemIntrinsicResults.cpp | 139 if (!FromLI->liveAt(FromIdx.getDeadSlot())) in replaceDominatedUses()
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| H A D | WebAssemblyRegStackify.cpp | 628 IsDead = !LI.liveAt(LIS.getInstructionIndex(Def).getDeadSlot()); in rematerializeCheapDef()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 205 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) in processBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonExpandCondsets.cpp | 474 if (!Seg.start.isRegister() || !Range.liveAt(Seg.start.getPrevSlot())) in updateDeadsInRange()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 1129 if (!LI.liveAt(SI) && LI.containsOneValue()) in insertVSETVLI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 1240 CCLiveAtMI = CCLiveRange->liveAt(MISlot); in foldMemoryOperandImpl()
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