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Searched refs:legalForTypesWithMemDesc (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LegalizerInfo.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86LegalizerInfo.cpp364 Action.legalForTypesWithMemDesc({{s8, p0, s1, 1}, in X86LegalizerInfo()
375 Action.legalForTypesWithMemDesc({{s64, p0, s8, 1}, in X86LegalizerInfo()
381 Action.legalForTypesWithMemDesc({{v4s32, p0, v4s32, 1}}); in X86LegalizerInfo()
383 Action.legalForTypesWithMemDesc({{v16s8, p0, v16s8, 1}, in X86LegalizerInfo()
388 Action.legalForTypesWithMemDesc({{v32s8, p0, v32s8, 1}, in X86LegalizerInfo()
394 Action.legalForTypesWithMemDesc({{v64s8, p0, v64s8, 1}, in X86LegalizerInfo()
405 Action.legalForTypesWithMemDesc({{s16, p0, s8, 1}, in X86LegalizerInfo()
409 Action.legalForTypesWithMemDesc({{s64, p0, s8, 1}, in X86LegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kLegalizerInfo.cpp41 .legalForTypesWithMemDesc({{s32, p0, s32, 4}, in M68kLegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCLegalizerInfo.cpp84 .legalForTypesWithMemDesc({{S64, P0, S64, 8}, {S32, P0, S32, 4}}); in PPCLegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVLegalizerInfo.cpp265 .legalForTypesWithMemDesc({{s32, p0, s8, 8}, in RISCVLegalizerInfo()
271 .legalForTypesWithMemDesc({{s32, p0, s8, 8}, {s32, p0, s16, 16}}); in RISCVLegalizerInfo()
273 LoadStoreActions.legalForTypesWithMemDesc({{s64, p0, s8, 8}, in RISCVLegalizerInfo()
277 ExtLoadActions.legalForTypesWithMemDesc( in RISCVLegalizerInfo()
280 LoadStoreActions.legalForTypesWithMemDesc({{s64, p0, s64, 64}}); in RISCVLegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp313 .legalForTypesWithMemDesc({{s32, p0, s8, 8}, in AArch64LegalizerInfo()
340 LoadActions.legalForTypesWithMemDesc({ in AArch64LegalizerInfo()
351 StoreActions.legalForTypesWithMemDesc({ in AArch64LegalizerInfo()
369 .legalForTypesWithMemDesc({{s8, p0, s8, 8}, in AArch64LegalizerInfo()
383 .legalForTypesWithMemDesc( in AArch64LegalizerInfo()
419 .legalForTypesWithMemDesc( in AArch64LegalizerInfo()
455 .legalForTypesWithMemDesc({ in AArch64LegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.cpp116 .legalForTypesWithMemDesc({{s8, p0, s8, 8}, in ARMLegalizerInfo()
142 .legalForTypesWithMemDesc({{s64, p0, s64, 32}}) in ARMLegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp163 .legalForTypesWithMemDesc({{s32, p0, s8, 8}, in MipsLegalizerInfo()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h622 LegalizeRuleSet &legalForTypesWithMemDesc( in legalForTypesWithMemDesc() function
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp1431 Actions.legalForTypesWithMemDesc({{S32, GlobalPtr, S32, GlobalAlign32}, in AMDGPULegalizerInfo()
1599 .legalForTypesWithMemDesc({{S32, GlobalPtr, S8, 8}, in AMDGPULegalizerInfo()
1613 ExtLoads.legalForTypesWithMemDesc( in AMDGPULegalizerInfo()