Home
last modified time | relevance | path

Searched refs:isVGPRClass (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h241 return isVGPRClass(getPhysRegBaseClass(Reg)); in isVGPRPhysReg()
245 static bool isVGPRClass(const TargetRegisterClass *RC) { in isVGPRClass() function
H A DSIRegisterInfo.cpp463 if (ST.hasMAIInsts() && (isVGPRClass(RC) || isAGPRClass(RC))) { in getLargestLegalSuperClass()
746 if (RC->isBaseClass() && isVGPRClass(RC)) { in getReservedRegs()
2702 if (isVGPRClass(getPhysRegBaseClass(MaterializedReg))) { in eliminateFrameIndex()
3714 return RC && isVGPRClass(RC); in isVGPR()
3994 if (isVGPRClass(&RC)) in isProperlyAlignedRC()
4014 if (isVGPRClass(RC)) in getProperlyAlignedRC()
H A DSIWholeQuadMode.cpp1490 if (TRI->isVGPRClass(regClass)) { in lowerCopyInstrs()
H A DSIInstrInfo.cpp7296 if (!RI.isVGPRClass(CurrRC)) in legalizeOperandsVALUt16()
8962 if (RI.isVGPRClass(NewDstRC) || NewDstRC == &AMDGPU::VReg_1RegClass) in getDestEquivalentVGPRClass()
H A DSIISelLowering.cpp16502 if (SIRegisterInfo::isVGPRClass(RC)) in getRegForInlineAsmConstraint()