Home
last modified time | relevance | path

Searched refs:isTypeLegalForClass (Results 1 – 15 of 15) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp242 else if (TRI->isTypeLegalForClass(*RC, MVT::v16i8)) in storeRegToStack()
244 else if (TRI->isTypeLegalForClass(*RC, MVT::v8i16) || in storeRegToStack()
245 TRI->isTypeLegalForClass(*RC, MVT::v8f16)) in storeRegToStack()
247 else if (TRI->isTypeLegalForClass(*RC, MVT::v4i32) || in storeRegToStack()
248 TRI->isTypeLegalForClass(*RC, MVT::v4f32)) in storeRegToStack()
250 else if (TRI->isTypeLegalForClass(*RC, MVT::v2i64) || in storeRegToStack()
251 TRI->isTypeLegalForClass(*RC, MVT::v2f64)) in storeRegToStack()
320 else if (TRI->isTypeLegalForClass(*RC, MVT::v16i8)) in loadRegFromStack()
322 else if (TRI->isTypeLegalForClass(*RC, MVT::v8i16) || in loadRegFromStack()
323 TRI->isTypeLegalForClass(*RC, MVT::v8f16)) in loadRegFromStack()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp149 if (TRI->isTypeLegalForClass(*RC, MVT::i8)) { in storeRegToStackSlot()
151 } else if (TRI->isTypeLegalForClass(*RC, MVT::i16)) { in storeRegToStackSlot()
179 if (TRI->isTypeLegalForClass(*RC, MVT::i8)) { in loadRegFromStackSlot()
181 } else if (TRI->isTypeLegalForClass(*RC, MVT::i16)) { in loadRegFromStackSlot()
H A DAVRRegisterInfo.cpp100 if (TRI->isTypeLegalForClass(*RC, MVT::i16)) { in getLargestLegalSuperClass()
104 if (TRI->isTypeLegalForClass(*RC, MVT::i8)) { in getLargestLegalSuperClass()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp95 if ((VT == MVT::Other || isTypeLegalForClass(*RC, VT)) && in getMaximalPhysRegClass()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp217 if ((VT == MVT::Other || isTypeLegalForClass(*RC, VT)) && in getMinimalPhysRegClass()
235 if ((!Ty.isValid() || isTypeLegalForClass(*RC, Ty)) && RC->contains(reg) && in getMinimalPhysRegClassLLT()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h314 bool isTypeLegalForClass(const TargetRegisterClass &RC, MVT T) const { in isTypeLegalForClass() function
322 bool isTypeLegalForClass(const TargetRegisterClass &RC, LLT T) const { in isTypeLegalForClass() function
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyAsmPrinter.cpp67 if (TRI->isTypeLegalForClass(*TRC, T)) in getRegType()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp161 assert(TRI->isTypeLegalForClass(*UseRC, VT) && in EmitCopyFromReg()
H A DSelectionDAGBuilder.cpp9637 !TRI.isTypeLegalForClass(*RC, OpInfo.ConstraintVT)) { in getRegistersForValue()
H A DTargetLowering.cpp5650 if (RI->isTypeLegalForClass(*RC, VT)) in getRegForInlineAsmConstraint()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp5902 TRI->isTypeLegalForClass(LoongArch::LSX128RegClass, VT)) in getRegForInlineAsmConstraint()
5905 TRI->isTypeLegalForClass(LoongArch::LASX256RegClass, VT)) in getRegForInlineAsmConstraint()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp2195 assert(TRI->isTypeLegalForClass(*RC, MVT::i32) && "Invalid destination!"); in emitEHSjLjSetJmp()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp20696 if (TRI->isTypeLegalForClass(*RC, VT.SimpleTy)) in getRegForInlineAsmConstraint()
20700 if (TRI->isTypeLegalForClass(RISCV::VMV0RegClass, VT.SimpleTy)) in getRegForInlineAsmConstraint()
20840 if (TRI->isTypeLegalForClass(RISCV::VMRegClass, VT.SimpleTy)) in getRegForInlineAsmConstraint()
20842 if (TRI->isTypeLegalForClass(RISCV::VRRegClass, VT.SimpleTy)) in getRegForInlineAsmConstraint()
20846 if (TRI->isTypeLegalForClass(*RC, VT.SimpleTy)) { in getRegForInlineAsmConstraint()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp35804 assert(TRI->isTypeLegalForClass(*RC, MVT::i32) && "Invalid destination!"); in emitEHSjLjSetJmp()
59146 if (TRI->isTypeLegalForClass(*Res.second, VT) || VT == MVT::Other) in getRegForInlineAsmConstraint()
59211 else if (TRI->isTypeLegalForClass(X86::VR128XRegClass, VT)) in getRegForInlineAsmConstraint()
59213 else if (TRI->isTypeLegalForClass(X86::VR256XRegClass, VT)) in getRegForInlineAsmConstraint()
59215 else if (TRI->isTypeLegalForClass(X86::VR512RegClass, VT)) in getRegForInlineAsmConstraint()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp12437 assert(TRI->isTypeLegalForClass(*RC, MVT::i32) && "Invalid destination!"); in emitEHSjLjSetJmp()