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Searched refs:isTypeLegal (Results 1 – 25 of 57) sorted by relevance

123

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DResourcePriorityQueue.cpp94 if (TLI->isTypeLegal(VT) in numberRCValPredInSU()
132 if (TLI->isTypeLegal(VT) in numberRCValSuccInSU()
327 if (TLI->isTypeLegal(VT) in rawRegPressureDelta()
339 if (TLI->isTypeLegal(VT) && TLI->getRegClassFor(VT) in rawRegPressureDelta()
476 if (TLI->isTypeLegal(VT)) { in scheduledNode()
487 if (TLI->isTypeLegal(VT)) { in scheduledNode()
H A DLegalizeTypesGeneric.cpp110 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST()
120 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST()
349 if (!isTypeLegal(NVT)) { in ExpandOp_BITCAST()
550 isTypeLegal(CondLHSVT) && in SplitRes_Select()
H A DFastISel.cpp249 if (!TLI.isTypeLegal(VT)) { in getRegForValue()
454 if (!TLI.isTypeLegal(VT)) { in selectBinaryOp()
1451 if (!TLI.isTypeLegal(DstVT)) in selectCast()
1455 if (!TLI.isTypeLegal(SrcVT)) in selectCast()
1476 !TLI.isTypeLegal(SrcEVT) || !TLI.isTypeLegal(DstEVT)) in selectBitCast()
1508 if (ETy == MVT::Other || !TLI.isTypeLegal(ETy)) in selectFreeze()
1684 if (!TLI.isTypeLegal(IntVT)) in selectFNeg()
1718 if (!TLI.isTypeLegal(VT) && VT != MVT::i1) in selectExtractValue()
2234 if (VT == MVT::Other || !TLI.isTypeLegal(VT)) { in handlePHINodesInSuccessorBlocks()
H A DLegalizeTypes.cpp138 } else if (isTypeLegal(Res.getValueType()) || IgnoreNodeResults(&Node)) { in PerformExpensiveChecks()
460 if (!isTypeLegal(Node.getValueType(i))) { in run()
469 !isTypeLegal(Node.getOperand(i).getValueType())) { in run()
H A DDAGCombiner.cpp263 TLI.isTypeLegal(EVT(VT)) && in DAGCombiner()
878 bool isTypeLegal(const EVT &VT) { in isTypeLegal() function in __anon666e37100111::DAGCombiner
880 return TLI.isTypeLegal(VT); in isTypeLegal()
4934 if (!TLI.isTypeLegal(VT) && !TLI.isOperationCustom(DivRemOpc, VT)) in useDivRem()
6202 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands()
6255 !(VT.isVector() && TLI.isTypeLegal(VT) && in hoistLogicOpWithSameOpcodeHands()
6256 !XVT.isVector() && !TLI.isTypeLegal(XVT))) { in hoistLogicOpWithSameOpcodeHands()
7186 if (!TLI.isTypeLegal(SrcVT)) in combineShiftAnd1ToBitTest()
8333 if (SV0 && SV1 && TLI.isTypeLegal(VT)) { in visitOR()
8975 if (TLI.isTypeLegal(VT) && LHS.hasOneUse() && RHS.hasOneUse() && in MatchRotate()
[all …]
H A DLegalizeVectorTypes.cpp2723 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) && in SplitVecRes_ExtendOp()
2724 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) { in SplitVecRes_ExtendOp()
4344 if (isTypeLegal(LoOutVT) || in SplitVecOp_TruncateHelper()
4503 if (!isTypeLegal(LHSLoVT) || !isTypeLegal(LHSHiVT)) in SplitVecOp_FPOpDifferentTypes()
5087 } while (!TLI.isTypeLegal(NextVT)); in CollectOpsToWiden()
5142 while (!TLI.isTypeLegal(VT) && NumElts != 1) { in WidenVecRes_BinaryCanTrap()
5162 TLI.isTypeLegal(WideMaskVT)) { in WidenVecRes_BinaryCanTrap()
5207 } while (!TLI.isTypeLegal(VT) && NumElts != 1); in WidenVecRes_BinaryCanTrap()
5247 while (!TLI.isTypeLegal(VT) && NumElts != 1) { in WidenVecRes_StrictFP()
5323 } while (!TLI.isTypeLegal(VT) && NumElts != 1); in WidenVecRes_StrictFP()
[all …]
H A DInstrEmitter.cpp105 if (TLI->isTypeLegal(VT)) in EmitCopyFromReg()
210 if (i < NumResults && TLI->isTypeLegal(Node->getSimpleValueType(i))) { in CreateVirtualRegisters()
415 TLI->isTypeLegal(OpVT) in AddOperand()
H A DLegalizeIntegerTypes.cpp437 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_AtomicCmpSwap()
567 if (isTypeLegal(WideOutVT)) { in PromoteIntRes_BITCAST()
590 if (isTypeLegal(WideVecVT)) { in PromoteIntRes_BITCAST()
697 if (!OVT.isVector() && TLI.isTypeLegal(NVT) && in PromoteIntRes_CTLZ()
757 if (N->getOpcode() == ISD::CTPOP && !OVT.isVector() && TLI.isTypeLegal(NVT) && in PromoteIntRes_CTPOP_PARITY()
788 if (!OVT.isVector() && TLI.isTypeLegal(NVT) && in PromoteIntRes_CTTZ()
1287 if (TLI.isTypeLegal(PromotedType)) { in PromoteIntRes_DIVFIX()
2224 if (isTypeLegal(WideVecVT)) { in PromoteIntOp_BITCAST()
2289 assert(!((NumElts & 1) && (!TLI.isTypeLegal(VecVT))) && in PromoteIntOp_BUILD_VECTOR()
4815 } while (!TLI.isTypeLegal(LoadVT)); in ExpandIntRes_ShiftThroughStack()
[all …]
H A DLegalizeDAG.cpp445 TLI.isTypeLegal(MVT::i32)) { in OptimizeFloatStore()
456 if (TLI.isTypeLegal(MVT::i64)) { in OptimizeFloatStore()
463 if (TLI.isTypeLegal(MVT::i32) && !ST->isVolatile()) { in OptimizeFloatStore()
644 if (TLI.isTypeLegal(StVT)) { in LegalizeStoreOps()
892 (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT? in LegalizeLoadOps()
1640 if (TLI.isTypeLegal(IVT)) { in getSignAsIntValue()
2682 if (SrcVT == MVT::i32 && TLI.isTypeLegal(MVT::f64) && in ExpandLegalINT_TO_FP()
3554 if (!TLI.isTypeLegal(EltVT)) { in ExpandNode()
3956 assert(TLI.isTypeLegal(HalfType)); in ExpandNode()
4423 assert(TLI.isTypeLegal(VT.getScalarType())&& "Element type must be legal"); in ExpandNode()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp981 assert(isTypeLegal(VT)); in canOpTrap()
1190 !TLI->isTypeLegal(MVT::getVectorVT(EltTy, EC))) { in getVectorTypeBreakdownMVT()
1198 if (!TLI->isTypeLegal(NewVT)) in getVectorTypeBreakdownMVT()
1222 if (isTypeLegal(*I)) in isLegalRC()
1382 if (isTypeLegal(IVT)) { in computeRegisterProperties()
1392 if (!isTypeLegal(MVT::ppcf128)) { in computeRegisterProperties()
1393 if (isTypeLegal(MVT::f64)) { in computeRegisterProperties()
1408 if (!isTypeLegal(MVT::f128)) { in computeRegisterProperties()
1417 if (!isTypeLegal(MVT::f80)) { in computeRegisterProperties()
1426 if (!isTypeLegal(MVT::f64)) { in computeRegisterProperties()
[all …]
H A DAnalysis.cpp281 TLI.isTypeLegal(EVT::getEVT(T1)) && TLI.isTypeLegal(EVT::getEVT(T2))); in isNoopBitcast()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp155 bool isTypeLegal(Type *Ty, MVT &VT, bool AllowI1 = false);
240 if (!isTypeLegal(RetTy, RetVT)) in foldX86XALUIntrinsic()
291 bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) { in isTypeLegal() function in X86FastISel
311 return (AllowI1 && VT == MVT::i1) || TLI.isTypeLegal(VT); in isTypeLegal()
1151 if (!isTypeLegal(Val->getType(), VT, /*AllowI1=*/true)) in X86SelectStore()
1339 if (!isTypeLegal(LI->getType(), VT, /*AllowI1=*/true)) in X86SelectLoad()
1441 if (!isTypeLegal(I->getOperand(0)->getType(), VT)) in X86SelectCmp()
1536 if (!TLI.isTypeLegal(DstVT)) in X86SelectZExt()
1594 if (!TLI.isTypeLegal(DstVT)) in X86SelectSExt()
1724 isTypeLegal(TI->getOperand(0)->getType(), SourceVT)) { in X86SelectBranch()
[all …]
H A DX86ISelLowering.cpp780 if (isTypeLegal(MVT::f32)) { in X86TargetLowering()
790 if (isTypeLegal(MVT::f64)) { in X86TargetLowering()
800 if (isTypeLegal(MVT::f16)) in X86TargetLowering()
875 if (isTypeLegal(MVT::f16)) { in X86TargetLowering()
926 if (isTypeLegal(MVT::f32)) { in X86TargetLowering()
930 if (isTypeLegal(MVT::f64)) { in X86TargetLowering()
934 if (isTypeLegal(MVT::f80)) { in X86TargetLowering()
3452 isTypeLegal(LoadVT) && isTypeLegal(BitcastVT)) in isLoadBitCastBeneficial()
3680 return isTypeLegal(VT); in shouldSplatInsEltVarIndex()
3685 if (isTypeLegal(VT)) in hasFastEqualityCompare()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp211 bool isTypeLegal(Type *Ty, MVT &VT);
703 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in ARMFastISel
712 return TLI.isTypeLegal(VT); in isTypeLegal()
716 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal()
1580 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP()
1628 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI()
1659 if (!isTypeLegal(I->getType(), VT)) in SelectSelect()
1739 if (!isTypeLegal(Ty, VT)) in SelectDiv()
1768 if (!isTypeLegal(Ty, VT)) in SelectRem()
2274 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h796 return isTypeLegal(VT) ? VT : MVT::INVALID_SIMPLE_VALUE_TYPE; in hasFastEqualityCompare()
1107 bool isTypeLegal(EVT VT) const { in isTypeLegal() function
1358 return (VT == MVT::Other || isTypeLegal(VT)) &&
1372 return (VT == MVT::Other || isTypeLegal(VT)) &&
1386 return (VT == MVT::Other || isTypeLegal(VT)) &&
1457 return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand); in isOperationExpand()
1462 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegal()
1529 return isTypeLegal(ValVT) && getTruncStoreAction(ValVT, MemVT) == Legal; in isTruncStoreLegal()
1535 return isTypeLegal(ValVT) && in isTruncStoreLegalOrCustom()
1699 } while (VTBits >= NVT.getScalarSizeInBits() || !isTypeLegal(NVT) || in getTypeToPromoteTo()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp135 bool isTypeLegal(Type *Ty, MVT &VT);
257 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in PPCFastISel
266 return TLI.isTypeLegal(VT); in isTypeLegal()
272 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal()
1053 if (!isTypeLegal(DstTy, DstVT)) in SelectIToFP()
1178 if (!isTypeLegal(DstTy, DstVT)) in SelectFPToI()
1191 if (!isTypeLegal(SrcTy, SrcVT)) in SelectFPToI()
1563 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in fastLowerCall()
1609 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp170 bool isTypeLegal(Type *Ty, MVT &VT);
589 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in MipsFastISel
598 return TLI.isTypeLegal(VT); in isTypeLegal()
605 if (isTypeLegal(Ty, VT)) in isTypeSupported()
617 if (isTypeLegal(Ty, VT)) in isLoadTypeLegal()
1110 if (!isTypeLegal(DstTy, DstVT)) in selectFPToInt()
1118 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt()
1534 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp180 bool isTypeLegal(Type *Ty, MVT &VT);
561 if (!isTypeLegal(CFP->getType(), VT)) in fastMaterializeFloatZero()
981 bool AArch64FastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in AArch64FastISel
998 return TLI.isTypeLegal(VT); in isTypeLegal()
1009 if (isTypeLegal(Ty, VT)) in isTypeSupported()
2826 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectFPToInt()
2859 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectIntToFP()
3201 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall()
3365 if (!isTypeLegal(RetTy, RetVT)) in foldXALUIntrinsic()
3543 if (!isTypeLegal(II->getType(), RetVT)) in fastLowerIntrinsicCall()
[all …]
H A DAArch64ISelLowering.cpp241 assert(VT.isVector() && DAG.getTargetLoweringInfo().isTypeLegal(VT) && in isPackedVectorType()
4095 if (!DAG.getTargetLoweringInfo().isTypeLegal(Sel->getValueType(0))) in LowerXOR()
4227 if (!DAG.getTargetLoweringInfo().isTypeLegal(Op.getValueType())) in LowerXALUO()
5114 assert(isTypeLegal(OpVT) && "Unexpected result type!"); in LowerBITCAST()
5117 if (!isTypeLegal(ArgVT)) { in LowerBITCAST()
5575 assert(VT.isScalableVector() && DAG.getTargetLoweringInfo().isTypeLegal(VT) && in getSVEPredicateBitCast()
5577 DAG.getTargetLoweringInfo().isTypeLegal(InVT) && in getSVEPredicateBitCast()
5870 } else if (Ty.isVector() && Ty.isInteger() && isTypeLegal(Ty)) { in LowerINTRINSIC_WO_CHAIN()
10468 if (!DAG.getTargetLoweringInfo().isTypeLegal(LHS->getValueType(0))) in LowerBR_CC()
11568 if (!DAG.getTargetLoweringInfo().isTypeLegal(CCVal->getValueType(0))) in LowerSELECT()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp793 if (!isTypeLegal(VT)) in RISCVTargetLowering()
864 if (!isTypeLegal(VT)) in RISCVTargetLowering()
973 if (isTypeLegal(FloatVT)) { in RISCVTargetLowering()
985 if (!isTypeLegal(VT)) in RISCVTargetLowering()
1168 if (isTypeLegal(EltVT)) in RISCVTargetLowering()
1202 if (!isTypeLegal(VT)) in RISCVTargetLowering()
1208 if (!isTypeLegal(VT)) in RISCVTargetLowering()
1216 if (!isTypeLegal(VT)) in RISCVTargetLowering()
1224 if (!isTypeLegal(VT)) in RISCVTargetLowering()
1234 if (!isTypeLegal(VT)) in RISCVTargetLowering()
[all …]
H A DRISCVGatherScatterLowering.cpp541 if (!TLI->isTypeLegal(DataTypeVT)) in tryCreateStridedLoadStore()
H A DRISCVInterleavedAccess.cpp31 if (!isTypeLegal(VT)) in isLegalInterleavedAccessType()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.h309 return isTypeLegal(VT.getSimpleVT()); in isShuffleMaskLegal()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DVectorUtils.cpp837 !TTI->isTypeLegal(I.getOperand(0)->getType())) in computeMinimumValueSizes()
846 if (TTI && isa<TruncInst>(&I) && TTI->isTypeLegal(I.getType())) in computeMinimumValueSizes()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2497 && (!hasHardQuad || !TLI.isTypeLegal(VT))) { in LowerFP_TO_SINT()
2505 if (!TLI.isTypeLegal(VT)) in LowerFP_TO_SINT()
2528 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP()
2536 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP()
2553 (hasHardQuad && TLI.isTypeLegal(VT))) in LowerFP_TO_UINT()
2573 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()

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