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Searched refs:isSucc (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMacroFusion.cpp114 if (SI.isWeak() || isHazard(SI) || &FirstSU == SU || FirstSU.isSucc(SU)) in fuseInstructionPair()
H A DMachinePipeliner.cpp2722 bool isSucc) { in isLoopCarriedDep() argument
2735 if (!isSucc) in isLoopCarriedDep()
3012 if (cycleScheduled(*I) == cycleScheduled(SU) && !(*I)->isSucc(SU)) { in orderDependence()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600Packetizer.cpp188 if (SUJ->isSucc(SUI)) { in isLegalToPacketizeTogether()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp935 if (PacketSU->isSucc(PacketSUDep)) { in restrictingDepExistInPacket()
999 if (PacketSU->isSucc(SU)) { in arePredicatesComplements()
1407 if (!SUJ->isSucc(SUI)) in isLegalToPacketizeTogether()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h457 bool isSucc(const SUnit *N) const { in isSucc() function
H A DMachinePipeliner.h263 bool isLoopCarriedDep(SUnit *Source, const SDep &Dep, bool isSucc = true);
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp963 assert(!SU->isSucc(OldSU) && "Something is wrong!"); in BacktrackBottomUp()