| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | PredicateExpander.cpp | 89 assert(Reg->isSubClassOf("Register") && "Expected a register Record!"); in expandCheckRegOperand() 294 if (Rec->isSubClassOf("MCOpcodeSwitchStatement")) { in expandStatement() 300 if (Rec->isSubClassOf("MCReturnStatement")) { in expandStatement() 310 if (Rec->isSubClassOf("MCTrue")) { in expandPredicate() 316 if (Rec->isSubClassOf("MCFalse")) { in expandPredicate() 322 if (Rec->isSubClassOf("CheckNot")) { in expandPredicate() 329 if (Rec->isSubClassOf("CheckIsRegOperand")) in expandPredicate() 332 if (Rec->isSubClassOf("CheckIsVRegOperand")) in expandPredicate() 335 if (Rec->isSubClassOf("CheckIsImmOperand")) in expandPredicate() 338 if (Rec->isSubClassOf("CheckRegOperand")) in expandPredicate() [all …]
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| H A D | CodeGenInstAlias.cpp | 49 if (InstOpRec->isSubClassOf("RegisterOperand")) in tryAliasOpMatch() 52 if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand")) in tryAliasOpMatch() 55 if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) { in tryAliasOpMatch() 56 if (!InstOpRec->isSubClassOf("RegisterClass")) in tryAliasOpMatch() 66 if (ADI && ADI->getDef()->isSubClassOf("Register")) { in tryAliasOpMatch() 67 if (InstOpRec->isSubClassOf("OptionalDefOperand")) { in tryAliasOpMatch() 74 if (!InstOpRec->isSubClassOf("RegisterClass")) in tryAliasOpMatch() 109 if (hasSubOps || !InstOpRec->isSubClassOf("Operand")) in tryAliasOpMatch() 121 if (hasSubOps || !InstOpRec->isSubClassOf("Operand")) in tryAliasOpMatch() 136 if (InstOpRec->isSubClassOf("Operand") && ADI && in tryAliasOpMatch() [all …]
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| H A D | InfoByHwMode.cpp | 39 if (R->isSubClassOf("PtrValueType")) in ValueTypeByHwMode() 45 if (R->isSubClassOf("PtrValueType")) in ValueTypeByHwMode() 110 if (!Rec->isSubClassOf("ValueType")) in getValueTypeByHwMode() 113 assert(Rec->isSubClassOf("ValueType") && in getValueTypeByHwMode() 115 if (Rec->isSubClassOf("HwModeSelect")) in getValueTypeByHwMode() 131 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const { in isSubClassOf() function in RegSizeInfo 161 bool RegSizeInfoByHwMode::isSubClassOf(const RegSizeInfoByHwMode &I) const { in isSubClassOf() function in RegSizeInfoByHwMode 163 return get(M0).isSubClassOf(I.get(M0)); in isSubClassOf() 208 assert(P.second && P.second->isSubClassOf("InstructionEncoding") && in EncodingInfoByHwMode()
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| H A D | CodeGenDAGPatterns.cpp | 1512 if (!Def->isSubClassOf("Predicate")) { in getPredicateRecords() 1557 if (R->isSubClassOf("SDTCisVT")) { in SDTypeConstraint() 1563 } else if (R->isSubClassOf("SDTCisPtrTy")) { in SDTypeConstraint() 1565 } else if (R->isSubClassOf("SDTCisInt")) { in SDTypeConstraint() 1567 } else if (R->isSubClassOf("SDTCisFP")) { in SDTypeConstraint() 1569 } else if (R->isSubClassOf("SDTCisVec")) { in SDTypeConstraint() 1571 } else if (R->isSubClassOf("SDTCisSameAs")) { in SDTypeConstraint() 1574 } else if (R->isSubClassOf("SDTCisVTSmallerThanOp")) { in SDTypeConstraint() 1577 } else if (R->isSubClassOf("SDTCisOpSmallerThanOp")) { in SDTypeConstraint() 1580 } else if (R->isSubClassOf("SDTCisEltOfVec")) { in SDTypeConstraint() [all …]
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| H A D | CodeGenSchedule.cpp | 479 if (Queue->isSubClassOf("LoadQueue")) { in collectLoadStoreQueueInfo() 489 if (Queue->isSubClassOf("StoreQueue")) { in collectLoadStoreQueueInfo() 546 if (ModelKey->isSubClassOf("SchedMachineModel")) { in addProcModel() 566 if (RWDef->isSubClassOf("WriteSequence")) { in scanSchedRW() 569 } else if (RWDef->isSubClassOf("SchedVariant")) { in scanSchedRW() 595 if (RW->isSubClassOf("SchedWrite")) in collectSchedRW() 598 assert(RW->isSubClassOf("SchedRead") && "Unknown SchedReadWrite"); in collectSchedRW() 608 if (RWDef->isSubClassOf("SchedWrite")) in collectSchedRW() 611 assert(RWDef->isSubClassOf("SchedRead") && "Unknown SchedReadWrite"); in collectSchedRW() 621 if (RWDef->isSubClassOf("SchedWrite")) in collectSchedRW() [all …]
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| H A D | CodeGenInstruction.cpp | 87 if (Rec->isSubClassOf("RegisterOperand")) { in CGIOperandList() 92 } else if (Rec->isSubClassOf("Operand")) { in CGIOperandList() 112 if (Rec->isSubClassOf("PredicateOp")) in CGIOperandList() 114 else if (Rec->isSubClassOf("OptionalDefOperand")) in CGIOperandList() 121 } else if (Rec->isSubClassOf("RegisterClass")) { in CGIOperandList() 123 } else if (!Rec->isSubClassOf("PointerLikeRegClass") && in CGIOperandList() 124 !Rec->isSubClassOf("unknown_class")) { in CGIOperandList() 521 assert(FirstImplicitDef->isSubClassOf("Register")); in HasOneImplicitDefWithKnownVT() 587 return Constraint->getDef()->isSubClassOf("TypedOperand") && in isOperandImpl()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CallingConvEmitter.cpp | 202 if (Action->isSubClassOf("CCPredicateAction")) { in emitAction() 205 if (Action->isSubClassOf("CCIfType")) { in emitAction() 214 } else if (Action->isSubClassOf("CCIf")) { in emitAction() 227 if (Action->isSubClassOf("CCDelegateTo")) { in emitAction() 233 } else if (Action->isSubClassOf("CCAssignToReg") || in emitAction() 234 Action->isSubClassOf("CCAssignToRegTuple") || in emitAction() 235 Action->isSubClassOf("CCAssignToRegAndStack")) { in emitAction() 246 if (Action->isSubClassOf("CCAssignToRegAndStack")) in emitAction() 251 } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) { in emitAction() 262 } else if (Action->isSubClassOf("CCAssignToStack")) { in emitAction() [all …]
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| H A D | DAGISelMatcherGen.cpp | 232 if (LeafRec->isSubClassOf("ValueType")) { in EmitLeafMatchCode() 241 LeafRec->isSubClassOf("RegisterClass") || in EmitLeafMatchCode() 242 LeafRec->isSubClassOf("RegisterOperand") || in EmitLeafMatchCode() 243 LeafRec->isSubClassOf("PointerLikeRegClass") || in EmitLeafMatchCode() 244 LeafRec->isSubClassOf("SubRegIndex") || in EmitLeafMatchCode() 251 if (LeafRec->isSubClassOf("Register")) { in EmitLeafMatchCode() 258 if (LeafRec->isSubClassOf("CondCode")) in EmitLeafMatchCode() 261 if (LeafRec->isSubClassOf("ComplexPattern")) { in EmitLeafMatchCode() 304 if (N.getOperator()->isSubClassOf("ComplexPattern")) { in EmitOperatorMatchCode() 674 if (Def->isSubClassOf("Register")) { in EmitResultLeafAsOperand() [all …]
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| H A D | MacroFusionPredicatorEmitter.cpp | 146 if (Predicate->isSubClassOf("WildcardPred")) { in emitFirstPredicate() 151 } else if (Predicate->isSubClassOf("OneUsePred")) { in emitFirstPredicate() 158 } else if (Predicate->isSubClassOf("FirstInstHasSameReg")) { in emitFirstPredicate() 188 } else if (Predicate->isSubClassOf("FusionPredicateWithMCInstPredicate")) { in emitFirstPredicate() 209 if (Predicate->isSubClassOf("FusionPredicateWithMCInstPredicate")) { in emitSecondPredicate() 219 } else if (Predicate->isSubClassOf("SecondInstHasSameReg")) { in emitSecondPredicate() 260 if (Predicate->isSubClassOf("FusionPredicateWithCode")) in emitBothPredicate() 262 else if (Predicate->isSubClassOf("BothFusionPredicateWithMCInstPredicate")) { in emitBothPredicate() 265 } else if (Predicate->isSubClassOf("TieReg")) { in emitBothPredicate()
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| H A D | GlobalISelEmitter.cpp | 171 if (Operator->isSubClassOf("SDNode")) in explainOperator() 174 if (Operator->isSubClassOf("Intrinsic")) in explainOperator() 177 if (Operator->isSubClassOf("ComplexPattern")) in explainOperator() 182 if (Operator->isSubClassOf("SDNodeXForm")) in explainOperator() 274 if (VDefInit->getDef()->isSubClassOf("RegisterOperand")) in getInitValueAsRegClass() 276 if (VDefInit->getDef()->isSubClassOf("RegisterClass")) in getInitValueAsRegClass() 296 assert(Dst.getOperator()->isSubClassOf("Instruction")); in getInstResultType() 884 if (!CCDef || !CCDef->isSubClassOf("CondCode")) in createAndImportSelDAGMatcher() 978 if (ChildRec->isSubClassOf("Register")) { in getSrcChildName() 996 SrcChild.getOperator()->isSubClassOf("ComplexPattern")) { in importChildMatcher() [all …]
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| H A D | CompressInstEmitter.cpp | 160 assert(Reg->isSubClassOf("Register") && "Reg record should be a Register"); in validateRegister() 161 assert(RegClass->isSubClassOf("RegisterClass") && in validateRegister() 175 if (DagOpType->isSubClassOf("RegisterClass") && in validateTypes() 176 InstOpType->isSubClassOf("RegisterClass")) { in validateTypes() 183 if (DagOpType->isSubClassOf("RegisterClass") || in validateTypes() 184 InstOpType->isSubClassOf("RegisterClass")) in validateTypes() 244 if (DI->getDef()->isSubClassOf("Register")) { in addDagOperandMapping() 272 if (OpndRec->isSubClassOf("RegisterClass")) in addDagOperandMapping() 543 !cast<DefInit>(Arg)->getDef()->isSubClassOf("SubtargetFeature")) in getReqFeatures() 751 if (Source.Operands[OpNo].Rec->isSubClassOf("RegisterClass")) in emitCompressInstEmitter() [all …]
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| H A D | FastISelEmitter.cpp | 269 if (OpLeafRec->isSubClassOf("RegisterOperand")) in initialize() 271 if (OpLeafRec->isSubClassOf("RegisterClass")) in initialize() 273 else if (OpLeafRec->isSubClassOf("Register")) in initialize() 275 else if (OpLeafRec->isSubClassOf("ValueType")) in initialize() 426 if (!OpLeafRec->isSubClassOf("Register")) in PhysRegForNode() 447 if (!Op->isSubClassOf("Instruction")) in collectPatterns() 465 if (ChildOp.getOperator()->isSubClassOf("Instruction")) { in collectPatterns() 479 if (Op0Rec->isSubClassOf("RegisterOperand")) in collectPatterns() 481 if (!Op0Rec->isSubClassOf("RegisterClass")) in collectPatterns()
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| H A D | InstrInfoEmitter.cpp | 143 if (OpR->isSubClassOf("RegisterOperand")) in GetOperandInfo() 145 if (OpR->isSubClassOf("RegisterClass")) in GetOperandInfo() 147 else if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo() 157 if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo() 162 if (Op.Rec->isSubClassOf("PredicateOp")) in GetOperandInfo() 167 if (Op.Rec->isSubClassOf("OptionalDefOperand")) in GetOperandInfo() 172 if (Op.Rec->isSubClassOf("BranchTargetOperand")) in GetOperandInfo() 441 if ((OpR->isSubClassOf("Operand") || OpR->isSubClassOf("RegisterOperand") || in emitOperandTypeMappings() 442 OpR->isSubClassOf("RegisterClass")) && in emitOperandTypeMappings() 464 if (!Op->isSubClassOf("X86MemOperand")) in emitOperandTypeMappings()
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| H A D | SubtargetEmitter.cpp | 663 if (!PRDef->isSubClassOf("ProcResGroup")) in emitProcessorResourceSubUnits() 823 if (PRDef->isSubClassOf("ProcResGroup")) { in emitProcessorResources() 864 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes")) in findWriteResources() 884 if (AliasDef && AliasDef->isSubClassOf("SchedWriteRes")) in findWriteResources() 922 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance")) in findReadAdvance() 943 if (AliasDef && AliasDef->isSubClassOf("SchedReadAdvance")) in findReadAdvance() 985 if (PRDef->isSubClassOf("ProcResGroup")) { in expandProcResources() 992 if (SubDef->isSubClassOf("ProcResGroup")) { in expandProcResources() 1006 if (PR == PRDef || !PR->isSubClassOf("ProcResGroup")) in expandProcResources() 1547 return Rec->isSubClassOf("MCSchedPredicate") && in isTruePredicate() [all …]
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| H A D | DAGISelEmitter.cpp | 52 if (Op->isSubClassOf("Instruction")) { in getResultPatternCost() 72 if (Op->isSubClassOf("Instruction")) { in getResultPatternSize()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Basic/ |
| H A D | CodeGenIntrinsics.cpp | 253 if (!Record->isSubClassOf("Intrinsic")) in operator []() 312 if (!TypeInfo->isSubClassOf("TypeInfoGen")) in CodeGenIntrinsic() 331 assert(Property->isSubClassOf("IntrinsicProperty") && in CodeGenIntrinsic() 407 else if (R->isSubClassOf("NoCapture")) { in setProperty() 410 } else if (R->isSubClassOf("NoAlias")) { in setProperty() 413 } else if (R->isSubClassOf("NoUndef")) { in setProperty() 416 } else if (R->isSubClassOf("NonNull")) { in setProperty() 419 } else if (R->isSubClassOf("Returned")) { in setProperty() 422 } else if (R->isSubClassOf("ReadOnly")) { in setProperty() 425 } else if (R->isSubClassOf("WriteOnly")) { in setProperty() [all …]
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| H A D | ARMTargetDefEmitter.cpp | 30 assert(Rec->isSubClassOf("SubtargetFeature") && in collectImpliedFeatures() 48 if (Feat->isSubClassOf("ExtensionWithMArch") && !DefaultExts.count(Feat)) in checkFeatureTree() 315 return F->isSubClassOf("Architecture64"); in emitARMTargetDef() 343 if (E->isSubClassOf("Extension")) { in emitARMTargetDef()
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| /freebsd/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | ClangSyntaxEmitter.cpp | 56 assert(N.Rec->isSubClassOf("Alternatives") || in Hierarchy() 57 N.Rec->isSubClassOf("External") || N.Derived.empty()); in Hierarchy() 58 assert(!N.Rec->isSubClassOf("Alternatives") || !N.Derived.empty()); in Hierarchy() 114 if (R.isSubClassOf("Optional")) { in SyntaxConstraint() 116 } else if (R.isSubClassOf("AnyToken")) { in SyntaxConstraint() 118 } else if (R.isSubClassOf("NodeType")) { in SyntaxConstraint() 203 if (N.Rec->isSubClassOf("External")) in EmitClangSyntaxNodeClasses() 217 if (N.Rec->isSubClassOf("Sequence")) { in EmitClangSyntaxNodeClasses() 220 assert(C->isSubClassOf("Role")); in EmitClangSyntaxNodeClasses()
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| H A D | ClangBuiltinsEmitter.cpp | 378 if (Builtin->isSubClassOf("LibBuiltin")) { in renderAttributes() 396 if (Attr->isSubClassOf("IndexedAttribute")) { in renderAttributes() 398 } else if (Attr->isSubClassOf("MultiIndexAttribute")) { in renderAttributes() 446 if (BuiltinRecord->isSubClassOf("Template")) { in collectBuiltins() 460 if (BuiltinRecord->isSubClassOf("AtomicBuiltin")) { in collectBuiltins() 462 } else if (BuiltinRecord->isSubClassOf("LangBuiltin")) { in collectBuiltins() 464 } else if (BuiltinRecord->isSubClassOf("TargetLibBuiltin")) { in collectBuiltins() 466 } else if (BuiltinRecord->isSubClassOf("TargetBuiltin")) { in collectBuiltins() 468 } else if (BuiltinRecord->isSubClassOf("LibBuiltin")) { in collectBuiltins() 495 if (BuiltinRecord->isSubClassOf("AtomicBuiltin")) in EmitClangBuiltins() [all …]
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| H A D | ClangTypeNodesEmitter.cpp | 152 if (type.isSubClassOf(AlwaysDependentClassName)) in emitNodeInvocations() 154 if (type.isSubClassOf(NeverCanonicalClassName)) in emitNodeInvocations() 156 if (type.isSubClassOf(NeverCanonicalUnlessDependentClassName)) in emitNodeInvocations() 185 if (!type.isSubClassOf(LeafTypeClassName)) continue; in emitLeafNodeInvocations()
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| H A D | ASTTableGen.h | 110 bool isSubClassOf(llvm::StringRef className) const { in isSubClassOf() function 111 return get()->isSubClassOf(className); in isSubClassOf() 116 return (isSubClassOf(NodeClass::getTableGenNodeClassName()) in getAs() 283 if (isSubClassOf(ArrayTypeClassName)) in getArrayElementType() 290 if (isSubClassOf(OptionalTypeClassName)) in getOptionalElementType() 297 if (isSubClassOf(SubclassPropertyTypeClassName)) in getSuperclassType() 311 return isSubClassOf(EnumPropertyTypeClassName); in isEnum()
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| H A D | ClangBuiltinTemplatesEmitter.cpp | 47 if (Arg->isSubClassOf("Template")) { in ParseTemplateParameterList() 57 } else if (Arg->isSubClassOf("Class")) { in ParseTemplateParameterList() 64 } else if (Arg->isSubClassOf("NTTP")) { in ParseTemplateParameterList() 79 } else if (Arg->isSubClassOf("BuiltinNTTP")) { in ParseTemplateParameterList()
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| H A D | MveEmitter.cpp | 1074 if (R->isSubClassOf("Immediate")) in getType() 1076 else if (R->isSubClassOf("unpromoted")) in getType() 1081 if (R->isSubClassOf("PrimitiveType")) in getType() 1083 if (R->isSubClassOf("ComplexType")) in getType() 1094 if (!Op->isSubClassOf("ComplexTypeOp")) in getType() 1120 if (Op->isSubClassOf("CTO_Tuple")) { in getType() 1126 if (Op->isSubClassOf("CTO_Pointer")) { in getType() 1142 if (Op->isSubClassOf("CTO_ScaleSize")) { in getType() 1178 } else if (Op->isSubClassOf("Type")) { in getCodeForDag() 1218 if (!TypeRec->isSubClassOf("Type")) in getCodeForDag() [all …]
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/ |
| H A D | CombinerUtils.h | 37 if (OpI->getDef()->isSubClassOf(Cls)) in getDefOfSubClass() 64 if (OpI->getDef()->isSubClassOf(Cls)) in getDagWithOperatorOfSubClass()
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| H A D | PatternParser.cpp | 32 if (Def.isSubClassOf("GICombineRule")) in print() 34 else if (Def.isSubClassOf(PatFrag::ClassName)) in print() 268 if (!R->isSubClassOf(MIFlagsEnumClassName)) { in parseInstructionPatternMIFlags() 329 if (!Def->isSubClassOf(PatFrag::ClassName)) in parsePatFragImpl()
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