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Searched refs:isRenamable (Results 1 – 14 of 14) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVPostRAExpandPseudoInsts.cpp94 bool Renamable = MBBI->getOperand(0).isRenamable(); in expandMovImm()
109 bool Renamable = MBBI->getOperand(0).isRenamable(); in expandMovAddr()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCopyPropagation.cpp697 if (!MOUse.isRenamable()) in forwardUses()
758 if (!CopySrc.isRenamable()) in forwardUses()
986 return CopyOperands.Source->isRenamable() && CopyOperands.Source->isKill(); in isBackwardPropagatableCopy()
1008 if (!MODef.isRenamable()) in propagateDefs()
1038 MODef.setIsRenamable(CopyOperands->Destination->isRenamable()); in propagateDefs()
1274 CopyOperands->Source->isRenamable() && in EliminateSpillageCopies()
1275 CopyOperands->Destination->isRenamable(); in EliminateSpillageCopies()
H A DBreakFalseDeps.cpp121 if (!MO.isRenamable()) in pickBestRegisterForUndef()
H A DMachineOperand.cpp124 bool MachineOperand::isRenamable() const { in isRenamable() function in MachineOperand
821 if (getReg().isPhysical() && isRenamable()) in print()
H A DTargetInstrInfo.cpp200 Reg1.isPhysical() ? MI.getOperand(Idx1).isRenamable() : false; in commuteInstructionImpl()
202 Reg2.isPhysical() ? MI.getOperand(Idx2).isRenamable() : false; in commuteInstructionImpl()
H A DMachineSink.cpp2109 if (!MI.isCopy() || !MI.getOperand(0).isRenamable()) { in tryToSinkCopy()
H A DMachineVerifier.cpp2519 if (MO->isRenamable()) { in visitMachineOperand()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineOperand.h112 /// See isRenamable().
409 /// isRenamable - Returns true if this register may be renamed, i.e. it does
419 /// isRenamable can return false for several different reasons:
434 /// isRenamable(). Additionally, the AllowRegisterRenaming target property
438 bool isRenamable() const;
843 bool isRenamable = false) {
850 Op.IsRenamable = isRenamable;
H A DMachineInstrBuilder.h583 RegOp.isRenamable()); in getRegState()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFixCortexA57AES1742098Pass.cpp418 unsigned Renamable = OperandToFixup->isRenamable() ? RegState::Renamable : 0; in insertAESFixup()
H A DARMExpandPseudoInsts.cpp2179 getRenamableRegState(MI.getOperand(0).isRenamable())) in ExpandMI()
2188 getRenamableRegState(MI.getOperand(0).isRenamable())) in ExpandMI()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFormMemoryClauses.cpp143 if (MO.getReg().isPhysical() && MO.isRenamable()) in getMopState()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ExpandPseudoInsts.cpp131 MI.getOperand(0).isRenamable() ? RegState::Renamable : 0; in expandMOVImm()
1206 getRenamableRegState(MI.getOperand(0).isRenamable())) in expandMI()
1215 getRenamableRegState(MI.getOperand(0).isRenamable())) in expandMI()
H A DAArch64LoadStoreOptimizer.cpp909 (MOP.isRenamable() && !MOP.isEarlyClobber())) && in mergePairedInsns()
931 (MOP.isRenamable() && !MOP.isEarlyClobber())) && in mergePairedInsns()
1451 (MOP.isRenamable() && !MOP.isEarlyClobber() && !MOP.isTied()); in canRenameMOP()