Home
last modified time | relevance | path

Searched refs:isRISCVVectorTuple (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DMachineValueType.h121 bool isRISCVVectorTuple() const { in isRISCVVectorTuple() function
128 return SimpleTy == MVT::aarch64svcount || isRISCVVectorTuple(); in isScalableTargetExtVT()
485 assert(isRISCVVectorTuple() && SimpleTy >= FIRST_VALUETYPE && in getRISCVVectorTupleNumFields()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h179 bool isRISCVVectorTuple() const { return V.isRISCVVectorTuple(); } in isRISCVVectorTuple() function
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DValueTypes.cpp165 if (isRISCVVectorTuple()) { in getEVTString()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVCallingConv.cpp548 if (ValVT.isVector() || ValVT.isRISCVVectorTuple()) { in CC_RISCV()
607 (ValVT.isVector() || ValVT.isRISCVVectorTuple()))) && in CC_RISCV()
H A DRISCVISelLowering.cpp2516 if (VT.isRISCVVectorTuple()) { in getLMUL()
2602 if (VT.isRISCVVectorTuple()) { in getRegClassIDForVecVT()
2664 if (VecVT.isRISCVVectorTuple()) { in decomposeSubvectorInsertExtractToSubRegs()
7911 if (VT.isRISCVVectorTuple()) { in LowerOperation()
7995 if (VT.isRISCVVectorTuple()) { in LowerOperation()
20634 if (VT.isRISCVVectorTuple() && N0->getOpcode() == ISD::SPLAT_VECTOR) { in PerformDAGCombine()
23954 if (ValueVT.isRISCVVectorTuple() && PartVT.isRISCVVectorTuple()) { in splitValueIntoRegisterParts()
H A DRISCVISelDAGToDAG.cpp2562 assert((V.getValueType().isRISCVVectorTuple() || !IsSubVecPartReg || in Select()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp1913 if (VT.isRISCVVectorTuple()) { in getValueImpl()