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Searched refs:isPending (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/MCA/
H A DInstruction.cpp195 assert(isPending() && "Unexpected instruction stage found!"); in updatePending()
212 return Use.isPending() || Use.isReady(); in updateDispatched()
228 if (isPending()) in update()
236 if (isDispatched() || isPending()) { in cycleEvent()
/freebsd/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DScheduler.cpp256 if (IS.isMemOp() && LSU.isPending(IR)) in analyzeDataDependencies()
259 if (IS.isPending()) in analyzeDataDependencies()
314 if (IS.isPending() || (IS.isMemOp() && LSU.isPending(IR))) { in dispatch()
/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DLSUnit.h101 bool isPending() const { in isPending() function
281 bool isPending(const InstRef &IR) const { in isPending() function
284 return Group.isPending(); in isPending()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h294 bool isPending : 1; ///< True once pending. variable
322 hasPhysRegClobbers(false), isPending(false), isAvailable(false), in SUnit()
334 hasPhysRegClobbers(false), isPending(false), isAvailable(false), in SUnit()
344 hasPhysRegDefs(false), hasPhysRegClobbers(false), isPending(false), in SUnit()
/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/
H A DInstruction.h367 bool isPending() const { return !IndependentFromDef && CyclesLeft > 0; } in isPending() function
686 bool isPending() const { return Stage == IS_PENDING; } in isPending() function
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp433 else if (!PredSU->isPending) { in ReleasePred()
434 PredSU->isPending = true; in ReleasePred()
623 PendingQueue[i]->isPending = false; in ReleasePending()
826 if (!PredSU->isPending) in CapturePred()
918 SU->isPending = true; in UnscheduleNodeBottomUp()
1452 SU->isPending = false; in releaseInterferences()
1484 CurSU->isPending = true; // This SU is not in AvailableQueue right now. in PickNodeToScheduleBottomUp()
1488 assert(CurSU->isPending && "Interferences are pending"); in PickNodeToScheduleBottomUp()
1528 if (!BtSU->isPending) in PickNodeToScheduleBottomUp()
H A DScheduleDAGFast.cpp564 CurSU->isPending = true; // This SU is not in AvailableQueue right now. in ListScheduleBottomUp()
626 SU->isPending = false; in ListScheduleBottomUp()
/freebsd/contrib/llvm-project/llvm/lib/MCA/Stages/
H A DExecuteStage.cpp208 if (Inst.isPending()) in execute()