| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelDAGToDAG.cpp | 313 if (isNullConstant(Op2)) { in selectAddCarry() 356 if (isNullConstant(Op2)) { in selectSubCarry()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 2106 if (isNullConstant(Op1)) in EmitCmp() 2158 if (Op0.hasOneUse() && isNullConstant(Op1) && in LowerSETCC() 2169 if ((isOneConstant(Op1) || isNullConstant(Op1)) && in LowerSETCC() 2176 bool Invert = (CC == ISD::SETNE) ^ isNullConstant(Op1); in LowerSETCC() 2194 if (!isNullConstant(Op1)) { in LowerSETCC() 2281 isNullConstant(Cond.getOperand(1).getOperand(0))) { in LowerSELECT() 2294 if (isNullConstant(Y) && in LowerSELECT() 2319 if (!isNullConstant(Op2)) in LowerSELECT() 2385 (isNullConstant(Op1) || isNullConstant(Op2))) { in LowerSELECT() 2463 isNullConstant(Cond.getOperand(1)) && in LowerBRCOND()
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| H A D | M68kISelDAGToDAG.cpp | 348 if (llvm::isNullConstant(U->getOperand(0))) in INITIALIZE_PASS()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSelectionDAGInfo.cpp | 71 if (isNullConstant(Src)) in EmitSpecializedLibcall()
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| H A D | ARMISelLowering.cpp | 4827 isNullConstant(BitcastOp->getOperand(0))) in isFloatingPointZero() 4943 if (isNullConstant(RHS)) { in getARMCmp() 5503 if (isNullConstant(LowerSatConstant)) { in LowerSELECT_CC() 5851 if (LHS.getResNo() == 1 && (isOneConstant(RHS) || isNullConstant(RHS)) && in LowerBR_CC() 10309 isNullConstant(N->getOperand(0)))); in isZeroVector() 12570 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes() 13169 if (!isNullConstant(UmlalNode->getOperand(3))) in AddCombineTo64bitUMAAL() 13172 if ((isNullConstant(AddeNode->getOperand(0)) && in AddCombineTo64bitUMAAL() 13175 isNullConstant(AddeNode->getOperand(1)))) { in AddCombineTo64bitUMAAL() 13203 isNullConstant(AddeNode->getOperand(0)) && in PerformUMLALCombine() [all …]
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| H A D | ARMISelDAGToDAG.cpp | 1130 if (!isNullConstant(N)) in SelectThumbAddrModeRRSext() 2718 return isNullConstant(N->getOperand(OpNo)); in SelectBaseMVE_VMLLDAV() 3552 if (!isNullConstant(Zero) || And->getOpcode() != ISD::AND) in SelectCMPZ() 3985 if (!isNullConstant(Zero) || Subc.getOperand(1) != SmulLoHi.getValue(0) || in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.cpp | 552 if (isNullConstant(BasePtr)) in getGatherScatterAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2682 if (isNullConstant(N1)) in visitPTRADD() 2686 if (PtrVT == IntVT && isNullConstant(N0)) in visitPTRADD() 2832 if (isNullConstant(N1)) in visitADDLike() 3209 if (isNullConstant(N1)) in visitADDSAT() 3369 if (N1.getOpcode() == ISD::UADDO_CARRY && isNullConstant(N1.getOperand(1)) && in visitADDLikeCommutative() 3402 if (isNullConstant(N1)) in visitADDC() 3496 if (N1.getOpcode() == ISD::UADDO_CARRY && isNullConstant(N1.getOperand(1))) { in visitUADDOLike() 3545 if (isNullConstant(CarryIn)) { in visitUADDO_CARRY() 3552 if (isNullConstant(N0) && isNullConstant(N1)) { in visitUADDO_CARRY() 3620 isNullConstant(Carry0.getOperand(1))) { in combineUADDO_CARRYDiamond() [all …]
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| H A D | SelectionDAG.cpp | 2266 if (SameNumElts || isNullConstant(Splat)) in getVectorShuffle() 4508 if (isNullConstant(N1)) in computeOverflowForSignedAdd() 4523 if (isNullConstant(N1)) in computeOverflowForUnsignedAdd() 4546 if (isNullConstant(N1)) in computeOverflowForSignedSub() 4564 if (isNullConstant(N1)) in computeOverflowForUnsignedSub() 4577 if (isNullConstant(N1) || isOneConstant(N1)) in computeOverflowForUnsignedMul() 4590 if (isNullConstant(N1) || isOneConstant(N1)) in computeOverflowForSignedMul() 6032 if (isNullConstant(Op.getOperand(0))) in isKnownNeverZero() 6771 if (Divisor.isUndef() || isNullConstant(Divisor)) in isUndef() 6777 isNullConstant(V); }); in isUndef() [all …]
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| H A D | TargetLowering.cpp | 882 (isNullConstant(Op1) || ISD::isBuildVectorAllZeros(Op1.getNode()))) in SimplifyMultipleUseDemandedBits() 1767 (isNullConstant(Op1) || ISD::isBuildVectorAllZeros(Op1.getNode()))) in SimplifyDemandedBits() 2900 isNullConstant(Op0)) in SimplifyDemandedBits() 3250 if (isNullConstant(Idx)) { in SimplifyDemandedVectorElts() 3407 (isNullConstant(SrcOp) || isNullFPConstant(SrcOp))) { in SimplifyDemandedVectorElts() 3540 KnownZero.setBitVal(Idx, isNullConstant(Scl) || isNullFPConstant(Scl)); in SimplifyDemandedVectorElts() 4166 if (Cond == ISD::SETNE && isNullConstant(N1) && in foldSetCCWithAnd() 4183 if (AndC && isNullConstant(N1) && AndC->getAPIntValue().isPowerOf2() && in foldSetCCWithAnd() 4233 if (isNullConstant(Y)) in foldSetCCWithAnd() 4269 if (isNullConstant(N1)) in foldSetCCWithOr() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2438 if (isIntEqualitySetCC(CC) && isNullConstant(RHS) && in translateSetCCForBranch() 4621 if (isOneConstant(VL) && isNullConstant(Scalar)) in lowerScalarSplat() 4642 isNullConstant(Scalar.getOperand(1))) { in lowerScalarInsert() 8952 if (isNullConstant(TrueV)) { in combineSelectToBinOp() 8958 if (isNullConstant(FalseV)) { in combineSelectToBinOp() 9086 if (isNullConstant(FalseV)) in lowerSELECT() 9089 if (isNullConstant(TrueV)) in lowerSELECT() 9154 if ((CCVal == ISD::SETLT && isNullConstant(CondV.getOperand(1))) || in lowerSELECT() 9926 if (!IdxC || isNullConstant(Idx)) in isValidVisniInsertExtractIndex() 10024 if (isNullConstant(Idx)) { in lowerINSERT_VECTOR_ELT() [all …]
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| H A D | RISCVISelDAGToDAG.cpp | 1828 if (isNullConstant(Lo) && isNullConstant(Hi)) { in Select() 3196 if (isNullConstant(RHS)) { in selectSETCC() 4009 !isNullConstant(N->getOperand(1))) in doPeepholeSExtW()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1132 return isNullConstant(Op.getOperand(1)) || in ppSimplifyOrSelect0() 1133 isNullConstant(Op.getOperand(2)); in ppSimplifyOrSelect0() 1147 if (isNullConstant(SY)) { in ppSimplifyOrSelect0() 1151 } else if (isNullConstant(SX)) { in ppSimplifyOrSelect0()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3976 return isNullConstant(Elt) || isNullFPConstant(Elt); in isZeroNode() 4132 isNullConstant(Vec.getOperand(2))) in extractSubVector() 4278 isNullConstant(Src.getOperand(2))) { in collectConcatOps() 4296 Sub.getOperand(0) == Src && isNullConstant(Sub.getOperand(1))) { in collectConcatOps() 5397 (isNullConstant(V.getOperand(1)) || V.getOperand(0).hasOneUse())) { in IsNOT() 6569 !isNullConstant(Src.getOperand(1)) || in getFauxShuffleMask() 18343 (isNullConstant(Splat) || isAllOnesConstant(Splat) || in lowerVECTOR_SHUFFLE() 18586 if (llvm::isNullConstant(Idx) && !X86::mayFoldIntoZeroExtend(Op) && in LowerEXTRACT_VECTOR_ELT_SSE4() 18607 if ((User->getOpcode() != ISD::STORE || isNullConstant(Idx)) && in LowerEXTRACT_VECTOR_ELT_SSE4() 19848 if (!isNullConstant(Extract.getOperand(1))) { in vectorizeExtractedCast() [all …]
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| H A D | X86ISelDAGToDAG.cpp | 820 isNullConstant(Root->getOperand(2)) && in IsProfitableToFold() 1889 if (isNullConstant(Address) && AM.Segment.getNode() == nullptr && in matchLoadInAddress() 3642 IsNegate = isNullConstant(StoredVal.getOperand(0)); in foldLoadStoreIntoMemOperand() 6148 if (!isNullConstant(N1)) in Select() 6467 if (isNullConstant(Node->getOperand(0)) && in Select() 6468 isNullConstant(Node->getOperand(1))) { in Select()
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| H A D | X86InstrFragmentsSIMD.td | 1252 return !isNullConstant(N->getOperand(1)); 1265 return !isNullConstant(N->getOperand(1));
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3223 return isNullConstant(Opnd0) || isNullFPConstant(Opnd0); in isZerosVector() 3421 return Op.getOpcode() == ISD::SUB && isNullConstant(Op.getOperand(0)) && in isCMN() 3471 } else if (LHS.getOpcode() == ISD::SUB && isNullConstant(LHS.getOperand(0)) && in emitComparison() 3477 } else if (isNullConstant(RHS) && !isUnsignedIntSetCC(CC)) { in emitComparison() 3576 } else if (LHS.getOpcode() == ISD::SUB && isNullConstant(LHS.getOperand(0)) && in emitConditionalComparison() 5446 isNullConstant(N0.getOperand(1)) && in LowerMUL() 5448 isNullConstant(N1.getOperand(1))) { in LowerMUL() 10335 if (!isNullConstant(AddrDiscriminator)) in LowerPtrAuthGlobalAddressStatically() 10391 SDValue TAddrDiscriminator = !isNullConstant(AddrDiscriminator) in LowerPtrAuthGlobalAddress() 10975 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && isNullConstant(RHS) && in performOrXorChainCombine() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 84 if (isNullConstant(Idx) && In.getValueSizeInBits() <= 32) in stripExtractLoElt() 1729 if (Subtarget->hasRestrictedSOffset() && isNullConstant(ByteOffsetNode)) { in SelectBUFSOffset() 2534 isNullConstant(VCMP.getOperand(1))) { in combineBallotPattern() 2568 isNullConstant(Cond->getOperand(1)) && in SelectBRCOND()
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| H A D | R600ISelLowering.cpp | 800 return isNullConstant(Op); in isHWFalseValue() 956 if (isNullConstant(Op.getOperand(0)) && SrcAS == AMDGPUAS::FLAT_ADDRESS) in lowerADDRSPACECAST()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2048 if (isNullConstant(RHS) && CC == ISD::SETNE && in LookThroughSetCC() 2055 isOneConstant(LHS.getOperand(0)) && isNullConstant(LHS.getOperand(1))) { in LookThroughSetCC() 2605 isNullConstant(RHS) && !ISD::isUnsignedIntSetCC(CC)) in LowerBR_CC() 2663 isNullConstant(RHS) && !ISD::isUnsignedIntSetCC(CC) && IsEligibleType) in LowerSELECT_CC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4849 if (!isNullConstant(CmpRHS)) in tryFoldSWTestBRCC() 4898 isNullConstant(LHS.getOperand(1))) in trySelectLoopCountIntrinsic() 5874 if (!isPPC64 && isNullConstant(N->getOperand(1)) && in Select() 5875 isOneConstant(N->getOperand(2)) && isNullConstant(N->getOperand(3)) && in Select() 6738 if (!isNullConstant(Op2->getOperand(0))) in AllUsersSelectZero()
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| H A D | PPCISelLowering.cpp | 2582 LeadingZero &= isNullConstant(UniquedVals[i]); in get_VSPLTI_elt() 15466 if (LHS.getOpcode() == ISD::SUB && isNullConstant(LHS.getOperand(0)) && in combineSetCC() 15472 if (RHS.getOpcode() == ISD::SUB && isNullConstant(RHS.getOperand(0)) && in combineSetCC() 16659 isNullConstant(LHS->getOperand(0)) && in DAGCombineAddc() 16660 isNullConstant(LHS->getOperand(1)) && isAllOnesConstant(RHS)) { in DAGCombineAddc() 16711 if (isNullConstant(N->getOperand(0))) // 0 << V -> 0. in PerformDAGCombine() 16715 if (isNullConstant(N->getOperand(0))) // 0 >>u V -> 0. in PerformDAGCombine() 17518 if (isNullConstant(LHS) && isNullConstant(RHS)) in computeKnownBitsForTargetNode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1031 bool andCC = isNullConstant(RHS) && LHS.hasOneUse() && in LowerSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1281 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1118 if (isNullConstant(LHS_HI) && isNullConstant(RHS_HI)) in computeKnownBitsForTargetNode()
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