Searched refs:isIntReg (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTfrCleanup.cpp | 72 bool isIntReg(unsigned Reg, bool &Is32);
87 bool HexagonTfrCleanup::isIntReg(unsigned Reg, bool &Is32) { in isIntReg() function in HexagonTfrCleanup
107 if (!isIntReg(Reg, Is32)) in getReg()
145 if (!isIntReg(DefR, Is32)) in updateImmMap()
206 if (!isIntReg(DstR, Is32) || !isIntReg(SrcR, Tmp)) in rewriteIfImm()
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| H A D | HexagonExpandCondsets.cpp | 238 bool isIntReg(RegisterRef RR, unsigned &BW);
1118 bool HexagonExpandCondsets::isIntReg(RegisterRef RR, unsigned &BW) { in isIntReg() function in HexagonExpandCondsets
1152 if (!isIntReg(R1, BW1) || !isIntReg(R2, BW2) || BW1 != BW2) in coalesceRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCDuplexInfo.cpp | 206 if (HexagonMCInstrInfo::isIntReg(SrcReg) && in getDuplexCandidateGroup()
263 HexagonMCInstrInfo::isIntReg(SrcReg) && Hexagon::R29 == SrcReg && in getDuplexCandidateGroup()
320 if (HexagonMCInstrInfo::isIntReg(Src1Reg) && in getDuplexCandidateGroup()
366 HexagonMCInstrInfo::isIntReg(Src1Reg) && Hexagon::R29 == Src1Reg && in getDuplexCandidateGroup()
414 if (HexagonMCInstrInfo::isIntReg(SrcReg) && Hexagon::R29 == SrcReg && in getDuplexCandidateGroup()
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| H A D | HexagonMCInstrInfo.h | 263 bool isIntReg(unsigned Reg);
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| H A D | HexagonMCInstrInfo.cpp | 660 bool HexagonMCInstrInfo::isIntReg(unsigned Reg) { in isIntReg() function in HexagonMCInstrInfo
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 301 bool isIntReg() const { in isIntReg() function in __anonebada3920211::SparcOperand
973 if (!LHS->isIntReg()) in parseMEMOperand()
986 if (RHS->isReg() && !RHS->isIntReg()) in parseMEMOperand()
1705 if (Op.isIntReg() && Kind == MCK_IntPair) { in validateTargetOperandClass()
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