Searched refs:isInsertSubreg (Results 1 – 16 of 16) sorted by relevance
104 } else if (DefMI->isInsertSubreg()) { in getAccDefMI()126 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()168 } else if (DefMI->isInsertSubreg()) { in hasLoopHazard()
245 if (MI->isInsertSubreg()) { in optimizeSDPattern()328 if (MI->isInsertSubreg() && usesRegClass(MI->getOperand(2), in hasPartialWrite()394 if (MI->isCopyLike() || MI->isInsertSubreg() || MI->isRegSequence() || in getReadDPRs()
4378 if (ResolvedDefMI->isCopyLike() || ResolvedDefMI->isInsertSubreg() || in getOperandLatency()4717 if (MI.isCopyLike() || MI.isInsertSubreg() || MI.isRegSequence() || in getPredicationCost()4738 if (MI.isCopyLike() || MI.isInsertSubreg() || MI.isRegSequence() || in getInstrLatency()
1835 let isInsertSubreg = 1 in
6542 let isInsertSubreg = 1;
71 !MI->isInsertSubreg() && in canTurnIntoImplicitDef()
244 (MI.isRegSequence() || MI.isInsertSubreg() || in isCoalescableCopy()969 assert(MI.isInsertSubreg() && "Invalid instruction"); in InsertSubregRewriter()1998 assert((Def->isInsertSubreg() || Def->isInsertSubregLike()) && in getNextSourceFromInsertSubreg()2141 if (Def->isInsertSubreg() || Def->isInsertSubregLike()) in getNextSourceImpl()
370 } else if (MI.isInsertSubreg() || MI.isSubregToReg()) { in isCopyToReg()1917 if (mi->isInsertSubreg()) { in run()
1706 assert((MI.isInsertSubreg() || in getInsertSubregInputs()1709 if (!MI.isInsertSubreg()) in getInsertSubregInputs()
146 FLAG(isInsertSubreg) in EmitInstrDocs()
1282 if (Inst.isInsertSubreg) in emitRecord()
281 bool isInsertSubreg : 1; variable
464 isInsertSubreg = R->getValueAsBit("isInsertSubreg"); in CodeGenInstruction()
660 if (isInsertSubreg() && OpIdx == 3)1410 bool isInsertSubreg() const {
676 bit isInsertSubreg = false; // Is this instruction a kind of insert subreg?
180 if (MI.isCopyLike() || MI.isInsertSubreg()) in isDataInvariant()