Searched refs:isInsertSubreg (Results 1 – 16 of 16) sorted by relevance
104 } else if (DefMI->isInsertSubreg()) { in getAccDefMI()126 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()168 } else if (DefMI->isInsertSubreg()) { in hasLoopHazard()
246 if (MI->isInsertSubreg()) { in optimizeSDPattern()329 if (MI->isInsertSubreg() && usesRegClass(MI->getOperand(2), in hasPartialWrite()395 if (MI->isCopyLike() || MI->isInsertSubreg() || MI->isRegSequence() || in getReadDPRs()
4221 if (ResolvedDefMI->isCopyLike() || ResolvedDefMI->isInsertSubreg() || in getOperandLatency()4560 if (MI.isCopyLike() || MI.isInsertSubreg() || MI.isRegSequence() || in getPredicationCost()4581 if (MI.isCopyLike() || MI.isInsertSubreg() || MI.isRegSequence() || in getInstrLatency()
1836 let isInsertSubreg = 1 in
6536 let isInsertSubreg = 1;
70 !MI->isInsertSubreg() && in canTurnIntoImplicitDef()
267 assert(MI.isInsertSubreg() && "Invalid instruction"); in InsertSubregRewriter()503 (!DisableAdvCopyOpt && (MI.isRegSequence() || MI.isInsertSubreg() || in isCoalescableCopy()2024 assert((Def->isInsertSubreg() || Def->isInsertSubregLike()) && in getNextSourceFromInsertSubreg()2147 if (Def->isInsertSubreg() || Def->isInsertSubregLike()) in getNextSourceImpl()
370 } else if (MI.isInsertSubreg() || MI.isSubregToReg()) { in isCopyToReg()1918 if (mi->isInsertSubreg()) { in run()
2016 assert((MI.isInsertSubreg() || in getInsertSubregInputs()2019 if (!MI.isInsertSubreg()) in getInsertSubregInputs()
146 FLAG(isInsertSubreg) in EmitInstrDocs()
1197 if (Inst.isInsertSubreg) in emitRecord()
279 bool isInsertSubreg : 1; variable
461 isInsertSubreg = R->getValueAsBit("isInsertSubreg"); in CodeGenInstruction()
657 if (isInsertSubreg() && OpIdx == 3)1413 bool isInsertSubreg() const {
681 bit isInsertSubreg = false; // Is this instruction a kind of insert subreg?
167 if (MI.isCopyLike() || MI.isInsertSubreg()) in isDataInvariant()