| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 1088 bool isInlineConstant(const APInt &Imm) const;
1090 bool isInlineConstant(const APFloat &Imm) const;
1099 bool isInlineConstant(const MachineOperand &MO, uint8_t OperandType) const { in isInlineConstant() function
1103 return isInlineConstant(MO.getImm(), OperandType); in isInlineConstant()
1105 bool isInlineConstant(int64_t ImmVal, uint8_t OperandType) const;
1107 bool isInlineConstant(const MachineOperand &MO, in isInlineConstant() function
1109 return isInlineConstant(MO, OpInfo.OperandType); in isInlineConstant()
1114 bool isInlineConstant(const MachineInstr &MI, in isInlineConstant() function
1122 return isInlineConstant(DefMO, MI.getDesc().operands()[OpIdx]); in isInlineConstant()
1127 bool isInlineConstant(const MachineInstr &MI, unsigned OpIdx) const { in isInlineConstant() function
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| H A D | SIShrinkInstructions.cpp | 173 !TII->isInlineConstant(*Src.getParent(), Src.getOperandNo()); in isKImmOperand()
178 !TII->isInlineConstant(*Src.getParent(), Src.getOperandNo()); in isKUImmOperand()
185 return !TII->isInlineConstant(Src); in isKImmOrKUImmOperand()
190 return !TII->isInlineConstant(Src); in isKImmOrKUImmOperand()
208 if (TII->isInlineConstant(Src)) in canModifyToInlineImmOp32()
217 if (TII->isInlineConstant(APInt(32, ModifiedImm, true))) in canModifyToInlineImmOp32()
222 if (TII->isInlineConstant(APInt(32, ModifiedImm, true))) in canModifyToInlineImmOp32()
436 if (Src2.isImm() && !TII->isInlineConstant(Src2)) { in shrinkMadFma()
475 if (Src1.isImm() && !TII->isInlineConstant(Src1)) in shrinkMadFma()
477 else if (Src0.isImm() && !TII->isInlineConstant(Src0)) in shrinkMadFma()
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| H A D | AMDGPUISelDAGToDAG.h | 97 return Subtarget->getInstrInfo()->isInlineConstant(Imm); in isInlineImmediate()
101 return Subtarget->getInstrInfo()->isInlineConstant(Imm); in isInlineImmediate()
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| H A D | AMDGPURegBankCombiner.cpp | 266 if ((!MRI.hasOneNonDBGUse(K0->VReg) || TII.isInlineConstant(K0->Value)) && in matchFPMinMaxToMed3()
267 (!MRI.hasOneNonDBGUse(K1->VReg) || TII.isInlineConstant(K1->Value))) { in matchFPMinMaxToMed3()
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| H A D | AMDGPUCombinerHelper.cpp | 489 if (ScalarDestTy == LLT::float32() && TII.isInlineConstant(*SelectTrueVal) && in matchCombineFmulWithSelectToFldexp()
490 TII.isInlineConstant(*SelectFalseVal)) in matchCombineFmulWithSelectToFldexp()
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| H A D | GCNVOPDUtils.cpp | 97 } else if (!TII.isInlineConstant(Src0)) { in checkVOPDRegConstraints()
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| H A D | SIInstrInfo.cpp | 2216 if (SrcOp.isReg() || isInlineConstant(MI, 1) || in expandPostRAPseudo()
2224 if (ST.hasPkMovB32() && Lo == Hi && isInlineConstant(Lo)) { in expandPostRAPseudo()
2283 if (Imm.isIntN(32) || isInlineConstant(Imm)) { in expandPostRAPseudo()
2806 !isInlineConstant(*MO0, OpInfo1)) in isLegalToSwap()
2809 !isInlineConstant(*MO1, OpInfo0)) in isLegalToSwap()
3589 if (Is64Bit || !isInlineConstant(Imm)) in foldImmediate()
3643 if (isInlineConstant(UseMI, Src0Idx, Imm)) in foldImmediate()
3675 !isInlineConstant(Def->getOperand(1))) in foldImmediate()
3732 isInlineConstant(Def->getOperand(1)) && in foldImmediate()
3747 isInlineConstant(Def->getOperand(1)) && in foldImmediate()
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| H A D | AMDGPUISelDAGToDAG.cpp | 330 return TII->isInlineConstant(C->getAPIntValue()); in isInlineImmediate()
333 return TII->isInlineConstant(C->getValueAPF()); in isInlineImmediate()
1922 !TII->isInlineConstant(APInt(32, Lo_32(COffsetVal))) + in SelectGlobalSAddr()
1923 !TII->isInlineConstant(APInt(32, Hi_32(COffsetVal))); in SelectGlobalSAddr()
3584 if (TII->isInlineConstant(FloatVal)) { in SelectWMMAVISrc()
3590 if (TII->isInlineConstant(RawValue.value())) { in SelectWMMAVISrc()
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| H A D | SIFoldOperands.cpp | 399 const bool UseVOP3 = !Src0->isImm() || TII->isInlineConstant(*Src0); in foldCopyToVGPROfScalarAddOfFrameIndex()
1246 if (UseImmVal && TII->isInlineConstant( in foldOperand()
1850 TII->isInlineConstant(*Lookup, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldCopyToAGPRRegSequence()
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| H A D | SIFixSGPRCopies.cpp | 748 TII->isInlineConstant(APInt(64, Copied.getImm(), true))) { in run()
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| H A D | AMDGPUInstructionSelector.cpp | 5088 if (TII.isInlineConstant(FPValReg->Value)) { in selectWMMAVISrc()
5100 if (TII.isInlineConstant(ICst)) { in selectWMMAVISrc()
5449 !TII.isInlineConstant(APInt(32, Lo_32(ConstOffset))) + in selectGlobalSAddr()
5450 !TII.isInlineConstant(APInt(32, Hi_32(ConstOffset))); in selectGlobalSAddr()
6798 return TII.isInlineConstant(Imm); in isInlineImmediate()
6802 return TII.isInlineConstant(Imm); in isInlineImmediate()
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| H A D | GCNHazardRecognizer.cpp | 3069 if (!TII.isInlineConstant(Op, OpInfo)) in fixVALUMaskWriteHazard()
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| H A D | SILoadStoreOptimizer.cpp | 1983 if (TII->isInlineConstant(V)) in createRegOrImm()
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| H A D | SIISelLowering.cpp | 12157 (CRHS->hasOneUse() && !TII->isInlineConstant(CRHS->getAPIntValue()))) { in splitBinaryBitConstantOp()
13934 if ((!K0->hasOneUse() || TII->isInlineConstant(K0->getValueAPF())) && in performFPMed3ImmCombine()
13935 (!K1->hasOneUse() || TII->isInlineConstant(K1->getValueAPF()))) { in performFPMed3ImmCombine()
15402 TII->isInlineConstant(TrueNode->getValueAPF()) && in performFMulCombine()
15403 TII->isInlineConstant(FalseNode->getValueAPF())) in performFMulCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1854 bool isInlineConstant(const MCInst &Inst, unsigned OpIdx) const;
3708 bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst, in isInlineConstant() function in AMDGPUAsmParser
3821 return !isInlineConstant(Inst, OpIdx); in usesConstantBus()
4403 if (Inst.getOperand(Src2Idx).isImm() && isInlineConstant(Inst, Src2Idx)) { in validateMAISrc2()
4838 if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) { in validateSOPLiteral()
5036 if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) { in validateVOPLiteral()
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