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Searched refs:isGFX12Plus (Results 1 – 25 of 28) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUAsmUtils.cpp118 {{"MSG_RTN_GET_SE_AID_ID"}, ID_RTN_GET_SE_AID_ID, isGFX12Plus},
180 {{"HW_REG_PERF_SNAPSHOT_DATA"}, ID_PERF_SNAPSHOT_DATA_gfx12, isGFX12Plus},
181 {{"HW_REG_PERF_SNAPSHOT_PC_LO"}, ID_PERF_SNAPSHOT_PC_LO_gfx12, isGFX12Plus},
182 {{"HW_REG_PERF_SNAPSHOT_PC_HI"}, ID_PERF_SNAPSHOT_PC_HI_gfx12, isGFX12Plus},
200 {{"HW_REG_SHADER_CYCLES_HI"}, ID_SHADER_CYCLES_HI, isGFX12Plus},
201 {{"HW_REG_DVGPR_ALLOC_LO"}, ID_DVGPR_ALLOC_LO, isGFX12Plus},
202 {{"HW_REG_DVGPR_ALLOC_HI"}, ID_DVGPR_ALLOC_HI, isGFX12Plus},
209 {{"HW_REG_STATE_PRIV"}, ID_STATE_PRIV, isGFX12Plus},
210 {{"HW_REG_PERF_SNAPSHOT_DATA1"}, ID_PERF_SNAPSHOT_DATA1, isGFX12Plus},
211 {{"HW_REG_PERF_SNAPSHOT_DATA2"}, ID_PERF_SNAPSHOT_DATA2, isGFX12Plus},
[all …]
H A DAMDKernelCodeTUtils.cpp397 if (G_00B848_DX10_CLAMP(Value) && AMDGPU::isGFX12Plus(*STI)) { in validate()
402 if (G_00B848_IEEE_MODE(Value) && AMDGPU::isGFX12Plus(*STI)) { in validate()
H A DAMDGPUBaseInfo.cpp2394 return isGFX11(STI) || isGFX12Plus(STI); in isGFX11Plus()
2401 bool isGFX12Plus(const MCSubtargetInfo &STI) { return isGFX12(STI); } in isGFX12Plus() function
2403 bool isNotGFX12Plus(const MCSubtargetInfo &STI) { return !isGFX12Plus(STI); } in isNotGFX12Plus()
2436 return isGFX10_BEncoding(STI) && !isGFX12Plus(STI); in isGFX10_3_GFX11()
3078 if (isGFX12Plus(ST)) in isLegalSMRDEncodedUnsignedOffset()
3087 if (isGFX12Plus(ST)) in isLegalSMRDEncodedSignedOffset()
3115 if (isGFX12Plus(ST)) // 24 bit signed offsets in getSMRDEncodedOffset()
H A DAMDGPUBaseInfo.h1526 bool isGFX12Plus(const MCSubtargetInfo &STI);
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DDSDIRInstructions.td189 let AssemblerPredicate = isGFX12Plus;
197 let SubtargetPredicate = isGFX12Plus in {
H A DSMInstructions.td468 let SubtargetPredicate = isGFX12Plus in {
476 } // end let SubtargetPredicate = isGFX12Plus
987 let SubtargetPredicate = isGFX12Plus;
994 let SubtargetPredicate = isGFX12Plus;
1001 let SubtargetPredicate = isGFX12Plus;
1008 let SubtargetPredicate = isGFX12Plus;
1018 let SubtargetPredicate = isGFX12Plus;
1025 let SubtargetPredicate = isGFX12Plus;
1034 let SubtargetPredicate = isGFX12Plus;
1155 let SubtargetPredicate = isGFX12Plus in {
[all …]
H A DEXPInstructions.td128 let AssemblerPredicate = isGFX12Plus;
H A DSOPInstructions.td426 let SubtargetPredicate = isGFX12Plus in {
430 } // End SubtargetPredicate = isGFX12Plus
656 let SubtargetPredicate = isGFX12Plus in {
680 } // End SubtargetPredicate = isGFX12Plus
927 let SubtargetPredicate = isGFX12Plus, mayRaiseFPException = 1, isCommutable = 1,
1606 let SubtargetPredicate = isGFX12Plus in {
1736 let SubtargetPredicate = isGFX12Plus, hasSideEffects = 1 in {
1765 } // End SubtargetPredicate = isGFX12Plus, hasSideEffects = 1
1832 let SubtargetPredicate = isGFX12Plus in
2025 let AssemblerPredicate = isGFX12Plus;
[all …]
H A DFLATInstructions.td929 let SubtargetPredicate = isGFX12Plus in {
932 } // End SubtargetPredicate = isGFX12Plus
1064 let SubtargetPredicate = isGFX12Plus in {
1070 } // End SubtargetPredicate = isGFX12Plus
1112 let SubtargetPredicate = isGFX12Plus in {
1126 } // End SubtargetPredicate = isGFX12Plus
1687 let SubtargetPredicate = isGFX12Plus in {
1857 let SubtargetPredicate = isGFX12Plus in {
1867 let WaveSizePredicate = isWave32, OtherPredicates = [isGFX12Plus] in {
H A DMIMGInstructions.td383 let SubtargetPredicate = isGFX12Plus;
384 let AssemblerPredicate = isGFX12Plus;
405 let SubtargetPredicate = isGFX12Plus;
406 let AssemblerPredicate = isGFX12Plus;
1087 let AssemblerPredicate = isGFX12Plus;
1685 let AssemblerPredicate = isGFX12Plus in {
1800 let SubtargetPredicate = isGFX12Plus in {
H A DVOP3Instructions.td256 } // End SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0
713 } // End SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0
749 let SubtargetPredicate = isGFX12Plus in {
820 let SubtargetPredicate = isGFX12Plus in {
1409 let SubtargetPredicate = isGFX12Plus in {
1418 } // End SubtargetPredicate = isGFX12Plus
H A DDSInstructions.td771 let SubtargetPredicate = isGFX12Plus in {
798 } // let SubtargetPredicate = isGFX12Plus
1363 let AssemblerPredicate = isGFX12Plus in {
1407 let AssemblerPredicate = isGFX12Plus in {
H A DVOP1Instructions.td705 let SubtargetPredicate = isGFX12Plus, OtherPredicates = [HasFP8ConversionInsts],
742 let SubtargetPredicate = isGFX12Plus in
754 let SubtargetPredicate = isGFX12Plus, OtherPredicates = [HasFP8ConversionInsts] in {
H A DVOP2Instructions.td1456 let SubtargetPredicate = isGFX12Plus, isReMaterializable = 1 in {
1464 } // End SubtargetPredicate = isGFX12Plus, isReMaterializable = 1
1830 let SubtargetPredicate = isGFX12Plus in {
1839 } // End SubtargetPredicate = isGFX12Plus
H A DAMDGPUInstructionSelector.cpp2041 const bool IsGFX12Plus = AMDGPU::isGFX12Plus(STI); in selectImageIntrinsic()
3465 bool IsGFX12Plus = AMDGPU::isGFX12Plus(STI); in selectBufferLoadLds()
6737 (AMDGPU::isGFX12Plus(STI) ? AMDGPU::CPol::ALL in renderExtractCPol()
6746 (AMDGPU::isGFX12Plus(STI) ? AMDGPU::CPol::SWZ in renderExtractSWZ()
6755 (AMDGPU::isGFX12Plus(STI) ? AMDGPU::CPol::ALL in renderExtractCpolSetGLC()
H A DVOP3PInstructions.td542 let SubtargetPredicate = isGFX12Plus in
1775 let WaveSizePredicate = isWave32, SubtargetPredicate = isGFX12Plus in {
1802 let WaveSizePredicate = isWave64, SubtargetPredicate = isGFX12Plus in {
H A DBUFInstructions.td1225 let SubtargetPredicate = isGFX12Plus in {
1748 let SubtargetPredicate = isGFX12Plus in {
2508 let AssemblerPredicate = isGFX12Plus;
H A DGCNHazardRecognizer.cpp1840 if (AMDGPU::isGFX12Plus(ST)) { in fixWMMAHazards()
H A DAMDGPU.td2302 def isGFX12Plus :
H A DSIInstructions.td1855 let SubtargetPredicate = isGFX12Plus in
3338 let OtherPredicates = !listconcat(f64_preds, [isGFX12Plus]);
H A DAMDGPUISelDAGToDAG.cpp1339 if (AMDGPU::isGFX12Plus(*Subtarget)) in isFlatScratchBaseLegalSVImm()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp111 if (DAsm->isGFX12Plus()) { // GFX12 supports 24-bit signed offsets. in decodeSMEMOffset()
2081 bool AMDGPUDisassembler::isGFX12Plus() const { in isGFX12Plus() function in AMDGPUDisassembler
2082 return AMDGPU::isGFX12Plus(STI); in isGFX12Plus()
2218 if (!isGFX12Plus()) in decodeCOMPUTE_PGM_RSRC1()
2224 if (!isGFX12Plus()) in decodeCOMPUTE_PGM_RSRC1()
2251 if (isGFX12Plus()) in decodeCOMPUTE_PGM_RSRC1()
2324 if (!isGFX12Plus()) { in decodeCOMPUTE_PGM_RSRC3()
2347 } else if (isGFX12Plus()) { in decodeCOMPUTE_PGM_RSRC3()
2361 if (isGFX12Plus()) { in decodeCOMPUTE_PGM_RSRC3()
H A DAMDGPUDisassembler.h218 bool isGFX12Plus() const;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp1557 bool isGFX12Plus() const { return AMDGPU::isGFX12Plus(getSTI()); } in isGFX12Plus() function in __anon6862249c0111::AMDGPUAsmParser
4722 if (isGFX12Plus() && in validateOffset()
4763 isGFX12Plus(); in validateFlatOffset()
4810 isGFX12Plus() ? "expected a 24-bit signed offset" in validateSMEMOffset()
5283 if (isGFX12Plus()) in validateCoherencyBits()
6913 if (isGFX12Plus()) { in parseCPol()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp156 if (AMDGPU::isGFX12Plus(STI)) { in printCPol()

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