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Searched refs:isGFX12Plus (Results 1 – 25 of 28) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUAsmUtils.cpp118 {{"MSG_RTN_GET_SE_AID_ID"}, ID_RTN_GET_SE_AID_ID, isGFX12Plus},
180 {{"HW_REG_PERF_SNAPSHOT_DATA"}, ID_PERF_SNAPSHOT_DATA_gfx12, isGFX12Plus},
181 {{"HW_REG_PERF_SNAPSHOT_PC_LO"}, ID_PERF_SNAPSHOT_PC_LO_gfx12, isGFX12Plus},
182 {{"HW_REG_PERF_SNAPSHOT_PC_HI"}, ID_PERF_SNAPSHOT_PC_HI_gfx12, isGFX12Plus},
200 {{"HW_REG_SHADER_CYCLES_HI"}, ID_SHADER_CYCLES_HI, isGFX12Plus},
201 {{"HW_REG_DVGPR_ALLOC_LO"}, ID_DVGPR_ALLOC_LO, isGFX12Plus},
202 {{"HW_REG_DVGPR_ALLOC_HI"}, ID_DVGPR_ALLOC_HI, isGFX12Plus},
209 {{"HW_REG_STATE_PRIV"}, ID_STATE_PRIV, isGFX12Plus},
210 {{"HW_REG_PERF_SNAPSHOT_DATA1"}, ID_PERF_SNAPSHOT_DATA1, isGFX12Plus},
211 {{"HW_REG_PERF_SNAPSHOT_DATA2"}, ID_PERF_SNAPSHOT_DATA2, isGFX12Plus},
[all …]
H A DAMDKernelCodeTUtils.cpp412 if (G_00B848_DX10_CLAMP(Value) && AMDGPU::isGFX12Plus(*STI)) { in validate()
417 if (G_00B848_IEEE_MODE(Value) && AMDGPU::isGFX12Plus(*STI)) { in validate()
H A DAMDGPUBaseInfo.cpp2155 return isGFX11(STI) || isGFX12Plus(STI); in isGFX11Plus()
2162 bool isGFX12Plus(const MCSubtargetInfo &STI) { return isGFX12(STI); } in isGFX12Plus() function
2164 bool isNotGFX12Plus(const MCSubtargetInfo &STI) { return !isGFX12Plus(STI); } in isNotGFX12Plus()
2195 return isGFX10_BEncoding(STI) && !isGFX12Plus(STI); in isGFX10_3_GFX11()
2828 if (isGFX12Plus(ST)) in isLegalSMRDEncodedUnsignedOffset()
2838 if (isGFX12Plus(ST)) in isLegalSMRDEncodedSignedOffset()
2868 if (isGFX12Plus(ST)) // 24 bit signed offsets in getSMRDEncodedOffset()
H A DAMDGPUBaseInfo.h1295 bool isGFX12Plus(const MCSubtargetInfo &STI);
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DDSDIRInstructions.td144 let SubtargetPredicate = isGFX12Plus in {
189 let AssemblerPredicate = isGFX12Plus;
H A DVOP3Instructions.td167 let SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0 in {
177 } // End SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0
229 let SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0 in {
232 } // End SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0
636 let SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0 in {
639 } // End SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0
669 let SubtargetPredicate = isGFX12Plus in {
714 let SubtargetPredicate = isGFX12Plus in {
891 let SubtargetPredicate = isGFX12Plus in {
900 } // End SubtargetPredicate = isGFX12Plus
[all …]
H A DSMInstructions.td464 let SubtargetPredicate = isGFX12Plus in {
472 } // end let SubtargetPredicate = isGFX12Plus
983 let OtherPredicates = [isGFX12Plus];
990 let OtherPredicates = [isGFX12Plus];
997 let OtherPredicates = [isGFX12Plus];
1004 let OtherPredicates = [isGFX12Plus];
1014 let OtherPredicates = [isGFX12Plus];
1021 let OtherPredicates = [isGFX12Plus];
1030 let OtherPredicates = [isGFX12Plus];
1430 let AssemblerPredicate = isGFX12Plus;
H A DEXPInstructions.td127 let AssemblerPredicate = isGFX12Plus;
H A DSOPInstructions.td679 let SubtargetPredicate = isGFX12Plus in {
701 } // End SubtargetPredicate = isGFX12Plus
948 let SubtargetPredicate = isGFX12Plus, mayRaiseFPException = 1, isCommutable = 1,
1631 let SubtargetPredicate = isGFX12Plus in {
1755 let SubtargetPredicate = isGFX12Plus, hasSideEffects = 1 in {
1784 } // End SubtargetPredicate = isGFX12Plus, hasSideEffects = 1
1825 let SubtargetPredicate = isGFX12Plus in
2004 let AssemblerPredicate = isGFX12Plus;
2231 let AssemblerPredicate = isGFX12Plus;
2440 let AssemblerPredicate = isGFX12Plus;
[all …]
H A DFLATInstructions.td808 let SubtargetPredicate = isGFX12Plus in {
811 } // End SubtargetPredicate = isGFX12Plus
935 let SubtargetPredicate = isGFX12Plus in {
942 } // End SubtargetPredicate = isGFX12Plus
978 let SubtargetPredicate = isGFX12Plus in {
1000 } // End SubtargetPredicate = isGFX12Plus
1441 let SubtargetPredicate = isGFX12Plus in {
1580 let SubtargetPredicate = isGFX12Plus in {
1587 let OtherPredicates = [isGFX12Plus] in {
H A DDSInstructions.td729 let SubtargetPredicate = isGFX12Plus in {
747 } // let SubtargetPredicate = isGFX12Plus
1213 let AssemblerPredicate = isGFX12Plus in {
1241 let AssemblerPredicate = isGFX12Plus in {
H A DMIMGInstructions.td381 let SubtargetPredicate = isGFX12Plus;
382 let AssemblerPredicate = isGFX12Plus;
403 let SubtargetPredicate = isGFX12Plus;
404 let AssemblerPredicate = isGFX12Plus;
1103 let AssemblerPredicate = isGFX12Plus;
H A DVOP3PInstructions.td112 let SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0 in {
115 } // End SubtargetPredicate = isGFX12Plus, ReadsModeReg = 0
480 let SubtargetPredicate = isGFX12Plus in
1296 let WaveSizePredicate = isWave32, SubtargetPredicate = isGFX12Plus in {
1323 let WaveSizePredicate = isWave64, SubtargetPredicate = isGFX12Plus in {
H A DVOP1Instructions.td668 let SubtargetPredicate = isGFX12Plus, OtherPredicates = [HasFP8ConversionInsts],
681 let SubtargetPredicate = isGFX12Plus, OtherPredicates = [HasFP8ConversionInsts] in {
694 let SubtargetPredicate = isGFX12Plus, OtherPredicates = [HasFP8ConversionInsts] in {
H A DVOP2Instructions.td1243 let SubtargetPredicate = isGFX12Plus, isReMaterializable = 1 in {
1255 } // End SubtargetPredicate = isGFX12Plus, isReMaterializable = 1
1602 let SubtargetPredicate = isGFX12Plus in {
1611 } // End SubtargetPredicate = isGFX12Plus
H A DAMDGPUInstructionSelector.cpp1812 const bool IsGFX12Plus = AMDGPU::isGFX12Plus(STI); in selectImageIntrinsic()
3186 assert(!AMDGPU::isGFX12Plus(STI)); in selectBufferLoadLds()
5671 (AMDGPU::isGFX12Plus(STI) ? AMDGPU::CPol::ALL in renderExtractCPol()
5680 (AMDGPU::isGFX12Plus(STI) ? AMDGPU::CPol::SWZ in renderExtractSWZ()
5689 (AMDGPU::isGFX12Plus(STI) ? AMDGPU::CPol::ALL in renderExtractCpolSetGLC()
H A DBUFInstructions.td1240 let SubtargetPredicate = isGFX12Plus in {
1758 let SubtargetPredicate = isGFX12Plus in {
2513 let AssemblerPredicate = isGFX12Plus;
H A DSIInstructions.td1871 let SubtargetPredicate = isGFX12Plus in
3041 let OtherPredicates = !listconcat(f64_preds, [isGFX12Plus]);
3620 let OtherPredicates = [isGFX12Plus] in {
H A DGCNHazardRecognizer.cpp1749 if (AMDGPU::isGFX12Plus(ST)) { in fixWMMAHazards()
H A DAMDGPU.td1955 def isGFX12Plus :
H A DAMDGPUISelDAGToDAG.cpp1226 if (AMDGPU::isGFX12Plus(*Subtarget)) in isFlatScratchBaseLegalSVImm()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp123 if (DAsm->isGFX12Plus()) { // GFX12 supports 24-bit signed offsets. in decodeSMEMOffset()
1823 bool AMDGPUDisassembler::isGFX12Plus() const { in isGFX12Plus() function in AMDGPUDisassembler
1824 return AMDGPU::isGFX12Plus(STI); in isGFX12Plus()
1958 if (!isGFX12Plus()) in decodeCOMPUTE_PGM_RSRC1()
1964 if (!isGFX12Plus()) in decodeCOMPUTE_PGM_RSRC1()
1991 if (isGFX12Plus()) in decodeCOMPUTE_PGM_RSRC1()
2064 if (!isGFX12Plus()) { in decodeCOMPUTE_PGM_RSRC3()
2087 } else if (isGFX12Plus()) { in decodeCOMPUTE_PGM_RSRC3()
2101 if (isGFX12Plus()) { in decodeCOMPUTE_PGM_RSRC3()
H A DAMDGPUDisassembler.h287 bool isGFX12Plus() const;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp1503 bool isGFX12Plus() const { return AMDGPU::isGFX12Plus(getSTI()); } in isGFX12Plus() function in __anon6862249c0111::AMDGPUAsmParser
4394 if (isGFX12Plus() && in validateOffset()
4435 isGFX12Plus(); in validateFlatOffset()
4482 isGFX12Plus() ? "expected a 24-bit signed offset" in validateSMEMOffset()
4913 if (isGFX12Plus()) in validateCoherencyBits()
6530 if (isGFX12Plus()) { in parseCPol()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp185 if (AMDGPU::isGFX12Plus(STI)) { in printCPol()

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