| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterBankInfo.h | |
| H A D | X86RegisterBankInfo.cpp | |
| H A D | X86ISelLowering.cpp | 2839 bool isFP, SDValue &LHS, SDValue &RHS, in TranslateX86CC() argument
2841 if (!isFP) { in TranslateX86CC()
23255 bool isFP = Op1.getSimpleValueType().isFloatingPoint(); in LowerVSETCC() local
23258 if (isFP) { in LowerVSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86RegisterBankInfo.h | 36 const LLT &Ty, bool isFP);
50 bool isFP) const;
55 const MachineRegisterInfo &MRI, const bool isFP,
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| H A D | X86RegisterBankInfo.cpp | 168 const LLT &Ty, bool isFP) { in getPartialMappingIdx() argument
175 isFP = true; in getPartialMappingIdx()
176 if ((Ty.isScalar() && !isFP) || Ty.isPointer()) { in getPartialMappingIdx()
223 const MachineInstr &MI, const MachineRegisterInfo &MRI, const bool isFP, in getInstrPartialMappingIdxs() argument
233 getPartialMappingIdx(MI, MRI.getType(MO.getReg()), isFP); in getInstrPartialMappingIdxs()
260 bool isFP) const { in getSameOperandsMapping()
271 auto Mapping = getValueMapping(getPartialMappingIdx(MI, Ty, isFP), 3); in getSameOperandsMapping()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | FastISelEmitter.cpp | 119 bool isFP() const { return Repr == OK_FP; } in isFP() function in __anon3cd78fb00311::OperandsSignature::OpKind
131 else if (isFP()) in printManglingSuffix()
314 } else if (Operands[i].isFP()) { in PrintParameters()
336 } else if (Operands[i].isFP()) { in PrintArguments()
352 } else if (Operands[i].isFP()) { in PrintArguments()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ValueTypes.td | 23 bit isFP = false;
42 let isFP = true;
50 let isFP = elt.isFP;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 999 string Type = !if(vt.isFP, "FP", "INT");
1586 RegisterOperand ret = !if(VT.isFP, retFlt, retInt);
1655 !if(VT.isFP, FP64InputMods, Int64InputMods),
1657 !if(VT.isFP, !if(IsTrue16, FPT16InputMods, FP16InputMods),
1659 !if(VT.isFP, FP32InputMods, Int32InputMods)));
1672 Operand ret = !if(VT.isFP, FPVRegInputMods, IntVRegInputMods);
1677 !if (VT.isFP,
1687 !if (VT.isFP,
2339 field bit HasSrc0FloatMods = Src0VT.isFP;
2340 field bit HasSrc1FloatMods = Src1VT.isFP;
[all …]
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| H A D | MIMGInstructions.td | 996 bit isFP = 0,
1000 FPAtomic = isFP in {
1110 multiclass MIMG_Atomic <mimgopc op, string asm, bit isCmpSwap = 0, bit isFP = 0,
1123 …defm _V1 : MIMG_Atomic_Addr_Helper_m <op, asm, !if(isCmpSwap, VReg_64, VGPR_32), 1, isFP, renamed>;
1125 …defm _V2 : MIMG_Atomic_Addr_Helper_m <op, asm, !if(isCmpSwap, VReg_128, VReg_64), 0, isFP, renamed…
1127 defm _V3 : MIMG_Atomic_Addr_Helper_m <op, asm, VReg_96, 0, isFP, renamed>;
1129 defm _V4 : MIMG_Atomic_Addr_Helper_m <op, asm, VReg_160, 0, isFP, renamed>;
1135 bit isCmpSwap = 0, bit isFP = 0>
1136 : MIMG_Atomic <op, asm, isCmpSwap, isFP, renamed>;
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| H A D | VOPInstructions.td | 143 let ReadsModeReg = !or(P.DstVT.isFP, P.Src0VT.isFP);
610 let ReadsModeReg = !or(P.DstVT.isFP, P.Src0VT.isFP);
827 let ReadsModeReg = !or(P.DstVT.isFP, P.Src0VT.isFP);
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| H A D | FLATInstructions.td | 537 let FPAtomic = data_vt.isFP;
554 let FPAtomic = data_vt.isFP;
585 let FPAtomic = data_vt.isFP;
595 let FPAtomic = data_vt.isFP;
616 let FPAtomic = data_vt.isFP;
626 let FPAtomic = data_vt.isFP;
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| H A D | VOP1Instructions.td | 52 let ReadsModeReg = !or(P.DstVT.isFP, P.Src0VT.isFP);
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| H A D | VOPCInstructions.td | 111 let AsmVOP3Base = !if(Src0VT.isFP, "$src0_modifiers, $src1_modifiers$clamp",
149 let ReadsModeReg = P.Src0VT.isFP;
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| H A D | VOP2Instructions.td | 72 let ReadsModeReg = !or(P.DstVT.isFP, P.Src0VT.isFP);
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| H A D | BUFInstructions.td | 786 let FPAtomic = vdataType.isFP in {
809 let FPAtomic = vdataType.isFP in {
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| H A D | VOP3PInstructions.td | 995 bit IsAB_F16 = !and(IsF16BF16, ArgTy[1].isFP);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrFormats.td | 146 bits<1> isFP = 0;
147 let TSFlags {48} = isFP; // Floating-point.
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| H A D | HexagonDepInstrInfo.td | 4117 let isFP = 1;
4129 let isFP = 1;
4139 let isFP = 1;
4149 let isFP = 1;
4161 let isFP = 1;
4171 let isFP = 1;
4181 let isFP = 1;
4193 let isFP = 1;
4205 let isFP = 1;
4217 let isFP
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2598 const bool isFP = Opcode == TargetOpcode::G_FCONSTANT; in select() local
2613 if (isFP) { in select()
2651 if (isFP) { in select()
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