Searched refs:isDS (Results 1 – 7 of 7) sorted by relevance
154 if (TII.isDS(MI.getOpcode())) { in isSendMsgTraceDataOrGDS()225 SIInstrInfo::isFLAT(*MI) || SIInstrInfo::isDS(*MI) || in getHazardType()254 SIInstrInfo::isDS(*MI)) && checkMAILdStHazards(MI) > 0) in getHazardType()363 SIInstrInfo::isFLAT(*MI) || SIInstrInfo::isDS(*MI) || in PreEmitNoopsCommon()394 SIInstrInfo::isDS(*MI)) in PreEmitNoopsCommon()1161 if (!SIInstrInfo::isVMEM(I) && !SIInstrInfo::isDS(I) && in fixVMEMtoScalarWriteHazards()1335 HasLds |= SIInstrInfo::isDS(MI); in shouldRunLdsBranchVmemWARHazardFixup()1359 if (SIInstrInfo::isDS(MI)) in fixLdsBranchVmemWARHazard()1429 SIInstrInfo::isDS(I) || SIInstrInfo::isEXP(I); in fixLdsDirectVALUHazard()1461 !SIInstrInfo::isDS(I)) in fixLdsDirectVMEMHazard()[all …]
1496 if (TII->isDS(Pred.getSUnit()->getInstr()->getOpcode()) && in analyzeDAG()1903 if (TII->isDS(*SuccUnit->getInstr()) && in apply()2085 else if (TII->isDS(*I)) { in applyIGLPStrategy()2412 (TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI)))) in canAddMI()2417 (TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI)))) in canAddMI()2422 (TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI)))) in canAddMI()2426 TII->isDS(MI)) in canAddMI()2430 MI.mayLoad() && TII->isDS(MI)) in canAddMI()2434 MI.mayStore() && TII->isDS(MI)) in canAddMI()
136 } else if (SIInstrInfo::isDS(MI)) { in runOnMachineFunction()
331 TII->isDS(MI) || TII->isWaitcnt(MI.getOpcode())) in mustRetainExeczBranch()
554 static bool isDS(const MachineInstr &MI) { in isDS() function558 bool isDS(uint16_t Opcode) const { in isDS() function
806 if (TII->isDS(Inst) && (Inst.mayStore() || Inst.mayLoad())) { in updateByEvent()929 (TII->isDS(Inst) || TII->mayWriteLDSThroughDMA(Inst))) { in updateByEvent()1988 if (TII->isDS(Inst) && TII->usesLGKM_CNT(Inst)) { in updateEventWaitcntAfter()
247 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()368 if (isDS(LdSt)) { in getMemOperandsWithOffsetWidth()3744 if (isDS(MIa)) { in areMemAccessesTriviallyDisjoint()3745 if (isDS(MIb)) in areMemAccessesTriviallyDisjoint()5135 if (isDS(MI) && !ST.hasGDS()) { in verifyInstruction()5253 uint16_t DataNameIdx = isDS(Opcode) ? AMDGPU::OpName::data0 in verifyInstruction()5788 (MI.mayLoad() || MI.mayStore() || isDS(Opc) || isMIMG(Opc))) in isOperandLegal()5793 isDS(Opc) ? AMDGPU::OpName::data0 : AMDGPU::OpName::vdata); in isOperandLegal()