1 //==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file provides WebAssembly-specific target descriptions.
11 ///
12 //===----------------------------------------------------------------------===//
13
14 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
16
17 #include "llvm/BinaryFormat/Wasm.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCInstrDesc.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/DataTypes.h"
22 #include <memory>
23
24 namespace llvm {
25
26 class MCAsmBackend;
27 class MCCodeEmitter;
28 class MCInstrInfo;
29 class MCObjectTargetWriter;
30 class Triple;
31
32 MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII,
33 MCContext &Ctx);
34
35 MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT);
36
37 std::unique_ptr<MCObjectTargetWriter>
38 createWebAssemblyWasmObjectWriter(bool Is64Bit, bool IsEmscripten);
39
40 namespace WebAssembly {
41
42 // Exception handling / setjmp-longjmp handling command-line options
43 extern cl::opt<bool> WasmEnableEmEH; // asm.js-style EH
44 extern cl::opt<bool> WasmEnableEmSjLj; // asm.js-style SjLJ
45 extern cl::opt<bool> WasmEnableEH; // EH using Wasm EH instructions
46 extern cl::opt<bool> WasmEnableSjLj; // SjLj using Wasm EH instructions
47 extern cl::opt<bool> WasmEnableExnref; // EH using new Wasm EH (exnref)
48
49 enum OperandType {
50 /// Basic block label in a branch construct.
51 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET,
52 /// Local index.
53 OPERAND_LOCAL,
54 /// Global index.
55 OPERAND_GLOBAL,
56 /// 32-bit integer immediates.
57 OPERAND_I32IMM,
58 /// 64-bit integer immediates.
59 OPERAND_I64IMM,
60 /// 32-bit floating-point immediates.
61 OPERAND_F32IMM,
62 /// 64-bit floating-point immediates.
63 OPERAND_F64IMM,
64 /// 8-bit vector lane immediate
65 OPERAND_VEC_I8IMM,
66 /// 16-bit vector lane immediate
67 OPERAND_VEC_I16IMM,
68 /// 32-bit vector lane immediate
69 OPERAND_VEC_I32IMM,
70 /// 64-bit vector lane immediate
71 OPERAND_VEC_I64IMM,
72 /// 32-bit unsigned function indices.
73 OPERAND_FUNCTION32,
74 /// 32-bit unsigned memory offsets.
75 OPERAND_OFFSET32,
76 /// 64-bit unsigned memory offsets.
77 OPERAND_OFFSET64,
78 /// p2align immediate for load and store address alignment.
79 OPERAND_P2ALIGN,
80 /// signature immediate for block/loop.
81 OPERAND_SIGNATURE,
82 /// type signature immediate for call_indirect.
83 OPERAND_TYPEINDEX,
84 /// Tag index.
85 OPERAND_TAG,
86 /// A list of branch targets for br_list.
87 OPERAND_BRLIST,
88 /// 32-bit unsigned table number.
89 OPERAND_TABLE,
90 };
91 } // end namespace WebAssembly
92
93 namespace WebAssemblyII {
94
95 /// Target Operand Flag enum.
96 enum TOF {
97 MO_NO_FLAG = 0,
98
99 // On a symbol operand this indicates that the immediate is a wasm global
100 // index. The value of the wasm global will be set to the symbol address at
101 // runtime. This adds a level of indirection similar to the GOT on native
102 // platforms.
103 MO_GOT,
104
105 // Same as MO_GOT but the address stored in the global is a TLS address.
106 MO_GOT_TLS,
107
108 // On a symbol operand this indicates that the immediate is the symbol
109 // address relative the __memory_base wasm global.
110 // Only applicable to data symbols.
111 MO_MEMORY_BASE_REL,
112
113 // On a symbol operand this indicates that the immediate is the symbol
114 // address relative the __tls_base wasm global.
115 // Only applicable to data symbols.
116 MO_TLS_BASE_REL,
117
118 // On a symbol operand this indicates that the immediate is the symbol
119 // address relative the __table_base wasm global.
120 // Only applicable to function symbols.
121 MO_TABLE_BASE_REL,
122 };
123
124 } // end namespace WebAssemblyII
125
126 } // end namespace llvm
127
128 // Defines symbolic names for WebAssembly registers. This defines a mapping from
129 // register name to register number.
130 //
131 #define GET_REGINFO_ENUM
132 #include "WebAssemblyGenRegisterInfo.inc"
133
134 // Defines symbolic names for the WebAssembly instructions.
135 //
136 #define GET_INSTRINFO_ENUM
137 #define GET_INSTRINFO_MC_HELPER_DECLS
138 #include "WebAssemblyGenInstrInfo.inc"
139
140 namespace llvm {
141 namespace WebAssembly {
142
143 /// Instruction opcodes emitted via means other than CodeGen.
144 static const unsigned Nop = 0x01;
145 static const unsigned End = 0x0b;
146
147 /// Return the default p2align value for a load or store with the given opcode.
GetDefaultP2AlignAny(unsigned Opc)148 inline unsigned GetDefaultP2AlignAny(unsigned Opc) {
149 switch (Opc) {
150 #define WASM_LOAD_STORE(NAME) \
151 case WebAssembly::NAME##_A32: \
152 case WebAssembly::NAME##_A64: \
153 case WebAssembly::NAME##_A32_S: \
154 case WebAssembly::NAME##_A64_S:
155 WASM_LOAD_STORE(LOAD8_S_I32)
156 WASM_LOAD_STORE(LOAD8_U_I32)
157 WASM_LOAD_STORE(LOAD8_S_I64)
158 WASM_LOAD_STORE(LOAD8_U_I64)
159 WASM_LOAD_STORE(ATOMIC_LOAD8_U_I32)
160 WASM_LOAD_STORE(ATOMIC_LOAD8_U_I64)
161 WASM_LOAD_STORE(STORE8_I32)
162 WASM_LOAD_STORE(STORE8_I64)
163 WASM_LOAD_STORE(ATOMIC_STORE8_I32)
164 WASM_LOAD_STORE(ATOMIC_STORE8_I64)
165 WASM_LOAD_STORE(ATOMIC_RMW8_U_ADD_I32)
166 WASM_LOAD_STORE(ATOMIC_RMW8_U_ADD_I64)
167 WASM_LOAD_STORE(ATOMIC_RMW8_U_SUB_I32)
168 WASM_LOAD_STORE(ATOMIC_RMW8_U_SUB_I64)
169 WASM_LOAD_STORE(ATOMIC_RMW8_U_AND_I32)
170 WASM_LOAD_STORE(ATOMIC_RMW8_U_AND_I64)
171 WASM_LOAD_STORE(ATOMIC_RMW8_U_OR_I32)
172 WASM_LOAD_STORE(ATOMIC_RMW8_U_OR_I64)
173 WASM_LOAD_STORE(ATOMIC_RMW8_U_XOR_I32)
174 WASM_LOAD_STORE(ATOMIC_RMW8_U_XOR_I64)
175 WASM_LOAD_STORE(ATOMIC_RMW8_U_XCHG_I32)
176 WASM_LOAD_STORE(ATOMIC_RMW8_U_XCHG_I64)
177 WASM_LOAD_STORE(ATOMIC_RMW8_U_CMPXCHG_I32)
178 WASM_LOAD_STORE(ATOMIC_RMW8_U_CMPXCHG_I64)
179 WASM_LOAD_STORE(LOAD8_SPLAT)
180 WASM_LOAD_STORE(LOAD_LANE_I8x16)
181 WASM_LOAD_STORE(STORE_LANE_I8x16)
182 return 0;
183 WASM_LOAD_STORE(LOAD16_S_I32)
184 WASM_LOAD_STORE(LOAD16_U_I32)
185 WASM_LOAD_STORE(LOAD16_S_I64)
186 WASM_LOAD_STORE(LOAD16_U_I64)
187 WASM_LOAD_STORE(ATOMIC_LOAD16_U_I32)
188 WASM_LOAD_STORE(ATOMIC_LOAD16_U_I64)
189 WASM_LOAD_STORE(STORE16_I32)
190 WASM_LOAD_STORE(STORE16_I64)
191 WASM_LOAD_STORE(ATOMIC_STORE16_I32)
192 WASM_LOAD_STORE(ATOMIC_STORE16_I64)
193 WASM_LOAD_STORE(ATOMIC_RMW16_U_ADD_I32)
194 WASM_LOAD_STORE(ATOMIC_RMW16_U_ADD_I64)
195 WASM_LOAD_STORE(ATOMIC_RMW16_U_SUB_I32)
196 WASM_LOAD_STORE(ATOMIC_RMW16_U_SUB_I64)
197 WASM_LOAD_STORE(ATOMIC_RMW16_U_AND_I32)
198 WASM_LOAD_STORE(ATOMIC_RMW16_U_AND_I64)
199 WASM_LOAD_STORE(ATOMIC_RMW16_U_OR_I32)
200 WASM_LOAD_STORE(ATOMIC_RMW16_U_OR_I64)
201 WASM_LOAD_STORE(ATOMIC_RMW16_U_XOR_I32)
202 WASM_LOAD_STORE(ATOMIC_RMW16_U_XOR_I64)
203 WASM_LOAD_STORE(ATOMIC_RMW16_U_XCHG_I32)
204 WASM_LOAD_STORE(ATOMIC_RMW16_U_XCHG_I64)
205 WASM_LOAD_STORE(ATOMIC_RMW16_U_CMPXCHG_I32)
206 WASM_LOAD_STORE(ATOMIC_RMW16_U_CMPXCHG_I64)
207 WASM_LOAD_STORE(LOAD16_SPLAT)
208 WASM_LOAD_STORE(LOAD_LANE_I16x8)
209 WASM_LOAD_STORE(STORE_LANE_I16x8)
210 WASM_LOAD_STORE(LOAD_F16_F32)
211 WASM_LOAD_STORE(STORE_F16_F32)
212 return 1;
213 WASM_LOAD_STORE(LOAD_I32)
214 WASM_LOAD_STORE(LOAD_F32)
215 WASM_LOAD_STORE(STORE_I32)
216 WASM_LOAD_STORE(STORE_F32)
217 WASM_LOAD_STORE(LOAD32_S_I64)
218 WASM_LOAD_STORE(LOAD32_U_I64)
219 WASM_LOAD_STORE(STORE32_I64)
220 WASM_LOAD_STORE(ATOMIC_LOAD_I32)
221 WASM_LOAD_STORE(ATOMIC_LOAD32_U_I64)
222 WASM_LOAD_STORE(ATOMIC_STORE_I32)
223 WASM_LOAD_STORE(ATOMIC_STORE32_I64)
224 WASM_LOAD_STORE(ATOMIC_RMW_ADD_I32)
225 WASM_LOAD_STORE(ATOMIC_RMW32_U_ADD_I64)
226 WASM_LOAD_STORE(ATOMIC_RMW_SUB_I32)
227 WASM_LOAD_STORE(ATOMIC_RMW32_U_SUB_I64)
228 WASM_LOAD_STORE(ATOMIC_RMW_AND_I32)
229 WASM_LOAD_STORE(ATOMIC_RMW32_U_AND_I64)
230 WASM_LOAD_STORE(ATOMIC_RMW_OR_I32)
231 WASM_LOAD_STORE(ATOMIC_RMW32_U_OR_I64)
232 WASM_LOAD_STORE(ATOMIC_RMW_XOR_I32)
233 WASM_LOAD_STORE(ATOMIC_RMW32_U_XOR_I64)
234 WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I32)
235 WASM_LOAD_STORE(ATOMIC_RMW32_U_XCHG_I64)
236 WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I32)
237 WASM_LOAD_STORE(ATOMIC_RMW32_U_CMPXCHG_I64)
238 WASM_LOAD_STORE(MEMORY_ATOMIC_NOTIFY)
239 WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT32)
240 WASM_LOAD_STORE(LOAD32_SPLAT)
241 WASM_LOAD_STORE(LOAD_ZERO_I32x4)
242 WASM_LOAD_STORE(LOAD_LANE_I32x4)
243 WASM_LOAD_STORE(STORE_LANE_I32x4)
244 return 2;
245 WASM_LOAD_STORE(LOAD_I64)
246 WASM_LOAD_STORE(LOAD_F64)
247 WASM_LOAD_STORE(STORE_I64)
248 WASM_LOAD_STORE(STORE_F64)
249 WASM_LOAD_STORE(ATOMIC_LOAD_I64)
250 WASM_LOAD_STORE(ATOMIC_STORE_I64)
251 WASM_LOAD_STORE(ATOMIC_RMW_ADD_I64)
252 WASM_LOAD_STORE(ATOMIC_RMW_SUB_I64)
253 WASM_LOAD_STORE(ATOMIC_RMW_AND_I64)
254 WASM_LOAD_STORE(ATOMIC_RMW_OR_I64)
255 WASM_LOAD_STORE(ATOMIC_RMW_XOR_I64)
256 WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I64)
257 WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I64)
258 WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT64)
259 WASM_LOAD_STORE(LOAD64_SPLAT)
260 WASM_LOAD_STORE(LOAD_EXTEND_S_I16x8)
261 WASM_LOAD_STORE(LOAD_EXTEND_U_I16x8)
262 WASM_LOAD_STORE(LOAD_EXTEND_S_I32x4)
263 WASM_LOAD_STORE(LOAD_EXTEND_U_I32x4)
264 WASM_LOAD_STORE(LOAD_EXTEND_S_I64x2)
265 WASM_LOAD_STORE(LOAD_EXTEND_U_I64x2)
266 WASM_LOAD_STORE(LOAD_ZERO_I64x2)
267 WASM_LOAD_STORE(LOAD_LANE_I64x2)
268 WASM_LOAD_STORE(STORE_LANE_I64x2)
269 return 3;
270 WASM_LOAD_STORE(LOAD_V128)
271 WASM_LOAD_STORE(STORE_V128)
272 return 4;
273 default:
274 return -1;
275 }
276 #undef WASM_LOAD_STORE
277 }
278
GetDefaultP2Align(unsigned Opc)279 inline unsigned GetDefaultP2Align(unsigned Opc) {
280 auto Align = GetDefaultP2AlignAny(Opc);
281 if (Align == -1U) {
282 llvm_unreachable("Only loads and stores have p2align values");
283 }
284 return Align;
285 }
286
isConst(unsigned Opc)287 inline bool isConst(unsigned Opc) {
288 switch (Opc) {
289 case WebAssembly::CONST_I32:
290 case WebAssembly::CONST_I32_S:
291 case WebAssembly::CONST_I64:
292 case WebAssembly::CONST_I64_S:
293 case WebAssembly::CONST_F32:
294 case WebAssembly::CONST_F32_S:
295 case WebAssembly::CONST_F64:
296 case WebAssembly::CONST_F64_S:
297 case WebAssembly::CONST_V128_I8x16:
298 case WebAssembly::CONST_V128_I8x16_S:
299 case WebAssembly::CONST_V128_I16x8:
300 case WebAssembly::CONST_V128_I16x8_S:
301 case WebAssembly::CONST_V128_I32x4:
302 case WebAssembly::CONST_V128_I32x4_S:
303 case WebAssembly::CONST_V128_I64x2:
304 case WebAssembly::CONST_V128_I64x2_S:
305 case WebAssembly::CONST_V128_F32x4:
306 case WebAssembly::CONST_V128_F32x4_S:
307 case WebAssembly::CONST_V128_F64x2:
308 case WebAssembly::CONST_V128_F64x2_S:
309 return true;
310 default:
311 return false;
312 }
313 }
314
isScalarConst(unsigned Opc)315 inline bool isScalarConst(unsigned Opc) {
316 switch (Opc) {
317 case WebAssembly::CONST_I32:
318 case WebAssembly::CONST_I32_S:
319 case WebAssembly::CONST_I64:
320 case WebAssembly::CONST_I64_S:
321 case WebAssembly::CONST_F32:
322 case WebAssembly::CONST_F32_S:
323 case WebAssembly::CONST_F64:
324 case WebAssembly::CONST_F64_S:
325 return true;
326 default:
327 return false;
328 }
329 }
330
isArgument(unsigned Opc)331 inline bool isArgument(unsigned Opc) {
332 switch (Opc) {
333 case WebAssembly::ARGUMENT_i32:
334 case WebAssembly::ARGUMENT_i32_S:
335 case WebAssembly::ARGUMENT_i64:
336 case WebAssembly::ARGUMENT_i64_S:
337 case WebAssembly::ARGUMENT_f32:
338 case WebAssembly::ARGUMENT_f32_S:
339 case WebAssembly::ARGUMENT_f64:
340 case WebAssembly::ARGUMENT_f64_S:
341 case WebAssembly::ARGUMENT_v16i8:
342 case WebAssembly::ARGUMENT_v16i8_S:
343 case WebAssembly::ARGUMENT_v8i16:
344 case WebAssembly::ARGUMENT_v8i16_S:
345 case WebAssembly::ARGUMENT_v4i32:
346 case WebAssembly::ARGUMENT_v4i32_S:
347 case WebAssembly::ARGUMENT_v2i64:
348 case WebAssembly::ARGUMENT_v2i64_S:
349 case WebAssembly::ARGUMENT_v8f16:
350 case WebAssembly::ARGUMENT_v8f16_S:
351 case WebAssembly::ARGUMENT_v4f32:
352 case WebAssembly::ARGUMENT_v4f32_S:
353 case WebAssembly::ARGUMENT_v2f64:
354 case WebAssembly::ARGUMENT_v2f64_S:
355 case WebAssembly::ARGUMENT_funcref:
356 case WebAssembly::ARGUMENT_funcref_S:
357 case WebAssembly::ARGUMENT_externref:
358 case WebAssembly::ARGUMENT_externref_S:
359 case WebAssembly::ARGUMENT_exnref:
360 case WebAssembly::ARGUMENT_exnref_S:
361 return true;
362 default:
363 return false;
364 }
365 }
366
isCopy(unsigned Opc)367 inline bool isCopy(unsigned Opc) {
368 switch (Opc) {
369 case WebAssembly::COPY_I32:
370 case WebAssembly::COPY_I32_S:
371 case WebAssembly::COPY_I64:
372 case WebAssembly::COPY_I64_S:
373 case WebAssembly::COPY_F32:
374 case WebAssembly::COPY_F32_S:
375 case WebAssembly::COPY_F64:
376 case WebAssembly::COPY_F64_S:
377 case WebAssembly::COPY_V128:
378 case WebAssembly::COPY_V128_S:
379 case WebAssembly::COPY_FUNCREF:
380 case WebAssembly::COPY_FUNCREF_S:
381 case WebAssembly::COPY_EXTERNREF:
382 case WebAssembly::COPY_EXTERNREF_S:
383 case WebAssembly::COPY_EXNREF:
384 case WebAssembly::COPY_EXNREF_S:
385 return true;
386 default:
387 return false;
388 }
389 }
390
isTee(unsigned Opc)391 inline bool isTee(unsigned Opc) {
392 switch (Opc) {
393 case WebAssembly::TEE_I32:
394 case WebAssembly::TEE_I32_S:
395 case WebAssembly::TEE_I64:
396 case WebAssembly::TEE_I64_S:
397 case WebAssembly::TEE_F32:
398 case WebAssembly::TEE_F32_S:
399 case WebAssembly::TEE_F64:
400 case WebAssembly::TEE_F64_S:
401 case WebAssembly::TEE_V128:
402 case WebAssembly::TEE_V128_S:
403 case WebAssembly::TEE_FUNCREF:
404 case WebAssembly::TEE_FUNCREF_S:
405 case WebAssembly::TEE_EXTERNREF:
406 case WebAssembly::TEE_EXTERNREF_S:
407 case WebAssembly::TEE_EXNREF:
408 case WebAssembly::TEE_EXNREF_S:
409 return true;
410 default:
411 return false;
412 }
413 }
414
isCallDirect(unsigned Opc)415 inline bool isCallDirect(unsigned Opc) {
416 switch (Opc) {
417 case WebAssembly::CALL:
418 case WebAssembly::CALL_S:
419 case WebAssembly::RET_CALL:
420 case WebAssembly::RET_CALL_S:
421 return true;
422 default:
423 return false;
424 }
425 }
426
isCallIndirect(unsigned Opc)427 inline bool isCallIndirect(unsigned Opc) {
428 switch (Opc) {
429 case WebAssembly::CALL_INDIRECT:
430 case WebAssembly::CALL_INDIRECT_S:
431 case WebAssembly::RET_CALL_INDIRECT:
432 case WebAssembly::RET_CALL_INDIRECT_S:
433 return true;
434 default:
435 return false;
436 }
437 }
438
isBrTable(unsigned Opc)439 inline bool isBrTable(unsigned Opc) {
440 switch (Opc) {
441 case WebAssembly::BR_TABLE_I32:
442 case WebAssembly::BR_TABLE_I32_S:
443 case WebAssembly::BR_TABLE_I64:
444 case WebAssembly::BR_TABLE_I64_S:
445 return true;
446 default:
447 return false;
448 }
449 }
450
isMarker(unsigned Opc)451 inline bool isMarker(unsigned Opc) {
452 switch (Opc) {
453 case WebAssembly::BLOCK:
454 case WebAssembly::BLOCK_S:
455 case WebAssembly::END_BLOCK:
456 case WebAssembly::END_BLOCK_S:
457 case WebAssembly::LOOP:
458 case WebAssembly::LOOP_S:
459 case WebAssembly::END_LOOP:
460 case WebAssembly::END_LOOP_S:
461 case WebAssembly::TRY:
462 case WebAssembly::TRY_S:
463 case WebAssembly::END_TRY:
464 case WebAssembly::END_TRY_S:
465 return true;
466 default:
467 return false;
468 }
469 }
470
isCatch(unsigned Opc)471 inline bool isCatch(unsigned Opc) {
472 switch (Opc) {
473 case WebAssembly::CATCH:
474 case WebAssembly::CATCH_S:
475 case WebAssembly::CATCH_ALL:
476 case WebAssembly::CATCH_ALL_S:
477 return true;
478 default:
479 return false;
480 }
481 }
482
isLocalGet(unsigned Opc)483 inline bool isLocalGet(unsigned Opc) {
484 switch (Opc) {
485 case WebAssembly::LOCAL_GET_I32:
486 case WebAssembly::LOCAL_GET_I32_S:
487 case WebAssembly::LOCAL_GET_I64:
488 case WebAssembly::LOCAL_GET_I64_S:
489 case WebAssembly::LOCAL_GET_F32:
490 case WebAssembly::LOCAL_GET_F32_S:
491 case WebAssembly::LOCAL_GET_F64:
492 case WebAssembly::LOCAL_GET_F64_S:
493 case WebAssembly::LOCAL_GET_V128:
494 case WebAssembly::LOCAL_GET_V128_S:
495 case WebAssembly::LOCAL_GET_FUNCREF:
496 case WebAssembly::LOCAL_GET_FUNCREF_S:
497 case WebAssembly::LOCAL_GET_EXTERNREF:
498 case WebAssembly::LOCAL_GET_EXTERNREF_S:
499 case WebAssembly::LOCAL_GET_EXNREF:
500 case WebAssembly::LOCAL_GET_EXNREF_S:
501 return true;
502 default:
503 return false;
504 }
505 }
506
isLocalSet(unsigned Opc)507 inline bool isLocalSet(unsigned Opc) {
508 switch (Opc) {
509 case WebAssembly::LOCAL_SET_I32:
510 case WebAssembly::LOCAL_SET_I32_S:
511 case WebAssembly::LOCAL_SET_I64:
512 case WebAssembly::LOCAL_SET_I64_S:
513 case WebAssembly::LOCAL_SET_F32:
514 case WebAssembly::LOCAL_SET_F32_S:
515 case WebAssembly::LOCAL_SET_F64:
516 case WebAssembly::LOCAL_SET_F64_S:
517 case WebAssembly::LOCAL_SET_V128:
518 case WebAssembly::LOCAL_SET_V128_S:
519 case WebAssembly::LOCAL_SET_FUNCREF:
520 case WebAssembly::LOCAL_SET_FUNCREF_S:
521 case WebAssembly::LOCAL_SET_EXTERNREF:
522 case WebAssembly::LOCAL_SET_EXTERNREF_S:
523 case WebAssembly::LOCAL_SET_EXNREF:
524 case WebAssembly::LOCAL_SET_EXNREF_S:
525 return true;
526 default:
527 return false;
528 }
529 }
530
isLocalTee(unsigned Opc)531 inline bool isLocalTee(unsigned Opc) {
532 switch (Opc) {
533 case WebAssembly::LOCAL_TEE_I32:
534 case WebAssembly::LOCAL_TEE_I32_S:
535 case WebAssembly::LOCAL_TEE_I64:
536 case WebAssembly::LOCAL_TEE_I64_S:
537 case WebAssembly::LOCAL_TEE_F32:
538 case WebAssembly::LOCAL_TEE_F32_S:
539 case WebAssembly::LOCAL_TEE_F64:
540 case WebAssembly::LOCAL_TEE_F64_S:
541 case WebAssembly::LOCAL_TEE_V128:
542 case WebAssembly::LOCAL_TEE_V128_S:
543 case WebAssembly::LOCAL_TEE_FUNCREF:
544 case WebAssembly::LOCAL_TEE_FUNCREF_S:
545 case WebAssembly::LOCAL_TEE_EXTERNREF:
546 case WebAssembly::LOCAL_TEE_EXTERNREF_S:
547 case WebAssembly::LOCAL_TEE_EXNREF:
548 case WebAssembly::LOCAL_TEE_EXNREF_S:
549 return true;
550 default:
551 return false;
552 }
553 }
554
555 static const unsigned UnusedReg = -1u;
556
557 // For a given stackified WAReg, return the id number to print with push/pop.
getWARegStackId(unsigned Reg)558 unsigned inline getWARegStackId(unsigned Reg) {
559 assert(Reg & INT32_MIN);
560 return Reg & INT32_MAX;
561 }
562
563 } // end namespace WebAssembly
564 } // end namespace llvm
565
566 #define GET_SUBTARGETINFO_ENUM
567 #include "WebAssemblyGenSubtargetInfo.inc"
568
569 #endif
570