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Searched refs:isARMLowRegister (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.cpp123 (SrcReg.isPhysical() && isARMLowRegister(SrcReg))) && in storeRegToStackSlot()
127 (SrcReg.isPhysical() && isARMLowRegister(SrcReg))) { in storeRegToStackSlot()
150 (DestReg.isPhysical() && isARMLowRegister(DestReg))) && in loadRegFromStackSlot()
154 (DestReg.isPhysical() && isARMLowRegister(DestReg))) { in loadRegFromStackSlot()
H A DThumb2SizeReduction.cpp392 if (!isARMLowRegister(Reg)) in VerifyLowRegs()
467 assert(isARMLowRegister(Rt)); in ReduceLoadStore()
468 assert(isARMLowRegister(Rn)); in ReduceLoadStore()
495 assert(isARMLowRegister(BaseReg)); in ReduceLoadStore()
551 } else if (!isARMLowRegister(BaseReg) || in ReduceLoadStore()
646 if (!isARMLowRegister(MI->getOperand(0).getReg())) in ReduceSpecial()
760 if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1) in ReduceTo2Addr()
761 || !isARMLowRegister(Reg2)) in ReduceTo2Addr()
785 if (Entry.LowRegs2 && !isARMLowRegister(Reg0)) in ReduceTo2Addr()
794 if (Entry.LowRegs2 && !isARMLowRegister(Reg2)) in ReduceTo2Addr()
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H A DThumbRegisterInfo.cpp108 assert((DestReg.isVirtual() || isARMLowRegister(DestReg)) && in emitLoadConstPool()
132 (DestReg.isVirtual() || isARMLowRegister(DestReg)) && NumBytes >= 0 && in emitThumbRegPlusImmInReg()
142 bool isHigh = DestReg.isVirtual() || !isARMLowRegister(DestReg) || in emitThumbRegPlusImmInReg()
143 (BaseReg != 0 && !isARMLowRegister(BaseReg)); in emitThumbRegPlusImmInReg()
156 if (!DestReg.isVirtual() && !isARMLowRegister(DestReg)) in emitThumbRegPlusImmInReg()
294 } else if (isARMLowRegister(DestReg)) { in emitThumbRegPlusImmediate()
304 } else if (isARMLowRegister(BaseReg)) { in emitThumbRegPlusImmediate()
H A DThumb1FrameLowering.cpp400 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr.asMCReg())) { in emitPrologue()
516 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr.asMCReg())) { in emitEpilogue()
H A DARMConstantIslandPass.cpp1832 if (isARMLowRegister(U.MI->getOperand(0).getReg())) { in optimizeThumb2Instructions()
1839 if (isARMLowRegister(U.MI->getOperand(0).getReg())) { in optimizeThumb2Instructions()
H A DARMLoadStoreOptimizer.cpp738 if (isARMLowRegister(NewBase) && isARMLowRegister(Base) && in CreateLoadStoreMulti()
H A DARMFrameLowering.cpp2973 isARMLowRegister(Reg) || in determineCalleeSaves()
3017 (!AFI->isThumb1OnlyFunction() || isARMLowRegister(Reg))) { in determineCalleeSaves()
H A DARMBaseInstrInfo.cpp5469 if (!isARMLowRegister(Reg)) in findCMPToFoldIntoCBZ()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h160 static inline bool isARMLowRegister(MCRegister Reg) { in isARMLowRegister() function
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp1753 return isARMLowRegister(Memory.BaseRegNum) && in isMemThumbRR()
1754 (!Memory.OffsetRegNum || isARMLowRegister(Memory.OffsetRegNum)); in isMemThumbRR()
1759 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs4()
1772 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs2()
1785 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs1()
7503 if (!isARMLowRegister(OpReg) && (!HiReg || OpReg != HiReg)) in checkLowRegisterList()
10446 if (isARMLowRegister(Inst.getOperand(0).getReg()) && in processInstruction()
10447 isARMLowRegister(Inst.getOperand(1).getReg()) && in processInstruction()
10479 if (isARMLowRegister(Inst.getOperand(0).getReg()) && in processInstruction()
10480 isARMLowRegister(Inst.getOperand(1).getReg()) && in processInstruction()
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