Searched refs:intVT (Results 1 – 1 of 1) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 9797 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), LoadedVT.getSizeInBits()); in expandUnalignedLoad() local 9798 if (isTypeLegal(intVT) && isTypeLegal(LoadedVT)) { in expandUnalignedLoad() 9799 if (!isOperationLegalOrCustom(ISD::LOAD, intVT) && in expandUnalignedLoad() 9807 SDValue newLoad = DAG.getLoad(intVT, dl, Chain, Ptr, in expandUnalignedLoad() 9819 MVT RegVT = getRegisterType(*DAG.getContext(), intVT); in expandUnalignedLoad() 9949 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in expandUnalignedStore() local 9950 if (isTypeLegal(intVT)) { in expandUnalignedStore() 9951 if (!isOperationLegalOrCustom(ISD::STORE, intVT) && in expandUnalignedStore() 9960 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val); in expandUnalignedStore()
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