Searched refs:inreg (Results 1 – 12 of 12) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcCallingConv.td | 70 // The difference is encoded in LLVM IR using the inreg attribute on function 77 // IR: declare void f(float inreg %f0, float inreg %f1) 83 // IR: declare void f(i32 inreg %i0high, float inreg %f1) 96 // inreg attributes. 103 // - Assign all arguments to 64-bit aligned stack slots, 32-bits for inreg. 112 // The frontend uses the inreg flag to indicate i32 and float arguments from
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/freebsd/sys/cddl/dev/dtrace/powerpc/ |
H A D | dtrace_isa.c | 434 int inreg = 7; 464 if (arg <= inreg) { 468 arg -= inreg; 485 if (arg <= inreg) { 495 arg -= (inreg + 1); 432 int inreg = 7; global() local
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/freebsd/sys/cddl/dev/dtrace/amd64/ |
H A D | dtrace_isa.c | 374 int inreg = 5; in dtrace_getarg() local 384 if (arg <= inreg) { in dtrace_getarg() 401 arg -= inreg; in dtrace_getarg() 421 if (arg <= inreg) { in dtrace_getarg() 431 arg -= (inreg + 1); in dtrace_getarg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiCallingConv.td | 22 // Put argument in registers if marked 'inreg' and not a vararg call.
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kCallingConv.td | 89 /// Use registers only if 'inreg' used and the call is not vararg
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetCallingConv.td | 78 /// CCIfInReg - If this argument is marked with the 'inreg' attribute, apply
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86CallingConv.td | 301 // with "inreg" (used here to distinguish one kind of reg from another, 838 // The first 3 float or double arguments, if marked 'inreg' and if the call 895 // The first 3 integer arguments, if marked 'inreg' and if the call is not
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | Attributes.td | 128 def InReg : EnumAttr<"inreg", [ParamAttr, RetAttr]>;
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H A D | IntrinsicsAMDGPU.td | 203 // Note: only inreg arguments to the parent function are valid as 1892 // llvm.amdgcn.interp.inreg.p10 <p>, <i>, <p0> 1898 // llvm.amdgcn.interp.inreg.p2 <p>, <j>, <tmp> 1904 // llvm.amdgcn.interp.inreg.p10.f16 <p>, <i>, <p0>, <high> 1912 // llvm.amdgcn.interp.inreg.p2.f16 <p>, <j>, <tmp>, <high>
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.td | 44 // instead. The presence of the inreg attribute indicates that SRet is 50 // The "inreg" attribute identifies non-aggregate types.
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H A D | AArch64InstrFormats.td | 6584 RegisterOperand inreg, RegisterOperand outreg, 6587 : I<(outs outreg:$Rd), (ins inreg:$Rn), asm, 6607 RegisterOperand inreg, RegisterOperand outreg, 6610 : I<(outs outreg:$dst), (ins outreg:$Rd, inreg:$Rn), asm,
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SOPInstructions.td | 1817 // Same as a 32-bit inreg
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