| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86Disassembler.cpp | 1569 insn->immediates[insn->numImmediatesConsumed] = imm8; in readImmediate() 1574 insn->immediates[insn->numImmediatesConsumed] = imm16; in readImmediate() 1579 insn->immediates[insn->numImmediatesConsumed] = imm32; in readImmediate() 1584 insn->immediates[insn->numImmediatesConsumed] = imm64; in readImmediate() 1718 insn->immediates[insn->numImmediatesConsumed] = in readOperands() 1719 insn->immediates[insn->numImmediatesConsumed - 1] & 0xf; in readOperands() 1773 insn->immediates[1] = oszcFromEVEX3of4(insn->vectorExtensionPrefix[2]); in readOperands() 1778 insn->immediates[2] = scFromEVEX4of4(insn->vectorExtensionPrefix[3]); in readOperands() 1780 insn->immediates[1] = insn->opcode & 0xf; in readOperands() 2400 insn.immediates[insn.numImmediatesTranslated++], in translateOperand() [all …]
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| H A D | X86DisassemblerDecoder.h | 772 uint64_t immediates[3]; member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperands.td | 318 // i32 immediates 343 // Short immediates 395 // Full 32-bit immediates. we need both signed and unsigned versions 409 // 64-bit immediates 474 // Negated immediates that fit LF32 or LH16. 485 // Short immediates. 540 // Floating-point immediates
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| H A D | SystemZInstrInfo.td | 442 // 16-bit sign-extended immediates. LHIMux expands to LHI or IIHF, 449 // Other 16-bit immediates. 455 // 32-bit immediates. 994 // ...likewise for 32-bit immediates. For GR32s this is a general 1033 // Addition of signed 16-bit immediates. 1038 // Addition of signed 32-bit immediates. 1075 // Addition of signed 16-bit immediates. 1081 // Addition of unsigned 32-bit immediates. 1085 // Addition of signed 32-bit immediates. 1183 // Subtraction of unsigned 32-bit immediates.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstr64Bit.td | 56 // All 32-bit immediates can be materialized with sethi+or, but 64-bit 57 // immediates may require more code. There may be a point where it is 67 // The ALU instructions want their simm13 operands as i32 immediates. 77 // All unsigned i32 immediates can be handled by sethi+or. 82 // All negative i33 immediates can be handled by sethi+xor.
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| H A D | SparcInstrVIS.td | 300 // FIXME generalize this to arbitrary immediates.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssembly.td | 38 "Enable overlong encoding for call_indirect immediates">;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrAMX.td | 83 // Pseudo instructions, using immediates instead of tile registers. 148 // Pseudo instructions, using immediates instead of tile registers. 189 // Pseudo instructions, using immediates instead of tile registers. 288 // Pseudo instructions, using immediates instead of tile registers.
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| H A D | X86InstrFragments.td | 436 // ranges, however, the immediates should be trivial to rematerialize by 446 // pulls block immediates to the top and merges them if necessary).
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| H A D | X86InstrOperands.td | 354 // 64-bit immediates, but for a 16-bit target value we want to accept both "-1"
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.td | 640 // * Wider immediates are a superset of narrower immediates: 642 // * For the same bit-width, unsigned immediates are a superset of signed 643 // immediates:: 645 // * For the same upper-bound, signed immediates are a superset of unsigned 646 // immediates: 648 // * Modified immediates are a superset of ordinary immediates: 652 // * 'Relaxed' immediates are supersets of the corresponding unsigned immediate. 3139 // Arbitrary immediates 3146 // Small immediates
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFeatures.td | 490 /// Implicitly convert an instruction to a different one if its immediates 493 : SubtargetFeature<"no-neg-immediates", 495 "Convert immediates and instructions "
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.td | 128 // 8-bit register class for instructions which take immediates.
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| /freebsd/contrib/llvm-project/lldb/source/Target/ |
| H A D | TargetProperties.td | 169 def UseHexImmediates: Property<"use-hex-immediates", "Boolean">, 171 Desc<"Show immediates in disassembly as hexadecimal.">;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoZb.td | 192 // Pattern to exclude simm12 immediates from matching, namely `non_imm12`. 207 // We do NOT want immediates that fit in 12 bits.
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| H A D | RISCVInstrFormats.td | 17 // One area of divergence is in the description of immediates. The
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonIntrinsics.td | 90 // otherwise, we need to updated the predicates for immediates to exclude zero
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrArithmetic.td | 613 // FIXME: Support immediates with different widths. 639 // This is used to cast immediates to 16-bits for operations which don't
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| H A D | M68kInstrData.td | 582 // These Pseudos handle loading immediates to registers.
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| H A D | M68kInstrInfo.td | 543 // Used for Shifts and Rotations, since M68k immediates in these instructions
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 768 // to accept immediates in the range -65536..65535 for compatibility with 875 // New addressing modes with 34 bit immediates.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Features.td | 769 def FeatureNoNegativeImmediates : SubtargetFeature<"no-neg-immediates", 771 "Convert immediates and instructions "
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.td | 22 // VE instructions have a space to hold following immediates 1601 // Small immediates. 1604 // Medium immediates. 1608 // Arbitrary immediates.
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | arm_mve_defs.td | 415 // ...). The set of valid immediates for these is {-127*n, ..., -1*n, 0*n, 1*n,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstructions.td | 131 // SIFoldOperands pass to enable folding of inline immediates. 4027 // ldexp. We skip over 0.5 to 4.0 as those are inline immediates 4034 // Prefer leaving the FP inline immediates as they are. 4047 // Prefer leaving the FP inline immediates as they are.
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