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Searched refs:immediates (Results 1 – 25 of 47) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1557 insn->immediates[insn->numImmediatesConsumed] = imm8; in readImmediate()
1562 insn->immediates[insn->numImmediatesConsumed] = imm16; in readImmediate()
1567 insn->immediates[insn->numImmediatesConsumed] = imm32; in readImmediate()
1572 insn->immediates[insn->numImmediatesConsumed] = imm64; in readImmediate()
1706 insn->immediates[insn->numImmediatesConsumed] = in readOperands()
1707 insn->immediates[insn->numImmediatesConsumed - 1] & 0xf; in readOperands()
1761 insn->immediates[1] = oszcFromEVEX3of4(insn->vectorExtensionPrefix[2]); in readOperands()
1766 insn->immediates[2] = scFromEVEX4of4(insn->vectorExtensionPrefix[3]); in readOperands()
1768 insn->immediates[1] = insn->opcode & 0xf; in readOperands()
2387 insn.immediates[insn.numImmediatesTranslated++], in translateOperand()
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H A DX86DisassemblerDecoder.h765 uint64_t immediates[3]; member
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperands.td311 // i32 immediates
336 // Short immediates
388 // Full 32-bit immediates. we need both signed and unsigned versions
402 // 64-bit immediates
467 // Negated immediates that fit LF32 or LH16.
478 // Short immediates.
533 // Floating-point immediates
H A DSystemZInstrInfo.td449 // 16-bit sign-extended immediates. LHIMux expands to LHI or IIHF,
456 // Other 16-bit immediates.
462 // 32-bit immediates.
968 // ...likewise for 32-bit immediates. For GR32s this is a general
1007 // Addition of signed 16-bit immediates.
1012 // Addition of signed 32-bit immediates.
1049 // Addition of signed 16-bit immediates.
1055 // Addition of unsigned 32-bit immediates.
1059 // Addition of signed 32-bit immediates.
1157 // Subtraction of unsigned 32-bit immediates.
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrAMX.td83 // Pseudo instructions, using immediates instead of tile registers.
148 // Pseudo instructions, using immediates instead of tile registers.
189 // Pseudo instructions, using immediates instead of tile registers.
H A DX86InstrFragments.td434 // ranges, however, the immediates should be trivial to rematerialize by
444 // pulls block immediates to the top and merges them if necessary).
H A DX86InstrOperands.td350 // 64-bit immediates, but for a 16-bit target value we want to accept both "-1"
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstr64Bit.td56 // All 32-bit immediates can be materialized with sethi+or, but 64-bit
57 // immediates may require more code. There may be a point where it is
67 // The ALU instructions want their simm13 operands as i32 immediates.
77 // All unsigned i32 immediates can be handled by sethi+or.
82 // All negative i33 immediates can be handled by sethi+xor.
H A DSparcInstrInfo.td1829 // Small immediates.
1832 // Arbitrary immediates.
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.td640 // * Wider immediates are a superset of narrower immediates:
642 // * For the same bit-width, unsigned immediates are a superset of signed
643 // immediates::
645 // * For the same upper-bound, signed immediates are a superset of unsigned
646 // immediates:
648 // * Modified immediates are a superset of ordinary immediates:
652 // * 'Relaxed' immediates are supersets of the corresponding unsigned immediate.
3127 // Arbitrary immediates
3134 // Small immediates
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFeatures.td480 /// Implicitly convert an instruction to a different one if its immediates
483 : SubtargetFeature<"no-neg-immediates",
485 "Convert immediates and instructions "
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.td129 // 8-bit register class for instructions which take immediates.
/freebsd/contrib/llvm-project/lldb/source/Target/
H A DTargetProperties.td154 def UseHexImmediates: Property<"use-hex-immediates", "Boolean">,
156 Desc<"Show immediates in disassembly as hexadecimal.">;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Features.td694 def FeatureNoNegativeImmediates : SubtargetFeature<"no-neg-immediates",
696 "Convert immediates and instructions "
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZb.td203 // Pattern to exclude simm12 immediates from matching, namely `non_imm12`.
220 // We do NOT want immediates that fit in 12 bits.
H A DRISCVInstrFormats.td17 // One area of divergence is in the description of immediates. The
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonIntrinsics.td90 // otherwise, we need to updated the predicates for immediates to exclude zero
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrArithmetic.td613 // FIXME: Support immediates with different widths.
639 // This is used to cast immediates to 16-bits for operations which don't
H A DM68kInstrData.td520 // These Pseudos handle loading immediates to registers.
H A DM68kInstrInfo.td511 // Used for Shifts and Rotations, since M68k immediates in these instructions
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td767 // to accept immediates in the range -65536..65535 for compatibility with
874 // New addressing modes with 34 bit immediates.
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.td22 // VE instructions have a space to hold following immediates
1601 // Small immediates.
1604 // Medium immediates.
1608 // Arbitrary immediates.
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_mve_defs.td414 // ...). The set of valid immediates for these is {-127*n, ..., -1*n, 0*n, 1*n,
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstructions.td131 // SIFoldOperands pass to enable folding of inline immediates.
3641 // ldexp. We skip over 0.5 to 4.0 as those are inline immediates
3648 // Prefer leaving the FP inline immediates as they are.
3661 // Prefer leaving the FP inline immediates as they are.
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1005 // to define immediates and other common things concisely.
2013 // immediate value on RISC targets that do not support immediates as large as

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