/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
H A D | XtensaInstrInfo.td | 59 def ADDI : RRI8_Inst<0x02, (outs AR:$t), (ins AR:$s, imm8:$imm8), 60 "addi\t$t, $s, $imm8", 61 [(set AR:$t, (add AR:$s, imm8:$imm8))]> { 71 let imm8 = imm_sh8{15-8}; 88 let imm8{7-0} = imm{7-0}; 207 let imm8{7-0} = addr{11-4}; 227 let imm8{7-0} = addr{11-4}; 260 let imm8{7-0} = addr{11-4}; 282 let imm8 = target; 295 let imm8 = target; [all …]
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H A D | XtensaInstrFormats.td | 82 bits<8> imm8; 84 let Inst{23-16} = imm8; 146 bits<8> imm8; 152 let Inst{23-16} = imm8;
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H A D | XtensaOperands.td | 24 // imm8 predicate - Immediate in the range [-128,127] 26 def imm8 : Immediate<i32, [{ return Imm >= -128 && Imm <= 127; }], "Imm8_AsmOperand"> { 32 // imm8 value left shifted by 8 bits
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchLBTInstrFormats.td | 106 : LAInst<(outs GPR:$rd), (ins uimm5:$imm5, uimm8:$imm8), 107 deriveInsnMnemonic<NAME>.ret, "$rd, $imm5, $imm8"> { 108 bits<8> imm8; 113 let Inst{17-10} = imm8; 134 : LAInst<(outs GPR:$rd), (ins uimm8:$imm8), 135 deriveInsnMnemonic<NAME>.ret, "$rd, $imm8"> { 136 bits<8> imm8; 140 let Inst{17-10} = imm8;
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H A D | LoongArchLASXInstrFormats.td | 263 bits<8> imm8; 268 let Inst{17-10} = imm8; 279 bits<8> imm8; 285 let Inst{17-10} = imm8; 296 bits<8> imm8; 302 let Inst{17-10} = imm8; 313 bits<8> imm8; 319 let Inst{17-10} = imm8; 330 bits<8> imm8; 336 let Inst{17-10} = imm8;
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H A D | LoongArchLSXInstrFormats.td | 291 bits<8> imm8; 296 let Inst{17-10} = imm8; 307 bits<8> imm8; 313 let Inst{17-10} = imm8; 324 bits<8> imm8; 330 let Inst{17-10} = imm8; 341 bits<8> imm8; 347 let Inst{17-10} = imm8; 358 bits<8> imm8; 364 let Inst{17-10} = imm8;
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H A D | LoongArchInstrFormats.td | 146 bits<8> imm8; 151 let Inst{17-10} = imm8;
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H A D | LoongArchLASXInstrInfo.td | 103 : Fmt2RI8_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm8), 104 "$xd, $xj, $imm8">; 109 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2), 110 "$xd, $rj, $imm8, $imm2">; 114 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm3), 115 "$xd, $rj, $imm8, $imm3">; 119 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm4), 120 "$xd, $rj, $imm8, $imm4">; 124 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm5), 125 "$xd, $rj, $imm8, $imm5">; [all …]
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H A D | LoongArchLSXInstrInfo.td | 261 : Fmt2RI8_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm8), 262 "$vd, $vj, $imm8">; 267 (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm1), 268 "$vd, $rj, $imm8, $imm1">; 272 (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2), 273 "$vd, $rj, $imm8, $imm2">; 277 (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm3), 278 "$vd, $rj, $imm8, $imm3">; 282 (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm4), 283 "$vd, $rj, $imm8, $imm4">; [all …]
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/freebsd/crypto/openssl/crypto/perlasm/ |
H A D | ppc-xlate.pl | 367 my ($f, $vrt, $imm8) = @_; 368 $imm8 = oct($imm8) if ($imm8 =~ /^0/); 369 $imm8 &= 0xff; 370 " .long ".sprintf "0x%X",(60<<26)|($vrt<<21)|($imm8<<11)|(360<<1)|1;
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYInstrFormatsF2.td | 119 !strconcat(op, "\t$vrz, ($rx, ${imm8})"), []> { 120 bits<10> imm8; 125 let Inst{24-21} = imm8{7-4}; 130 let Inst{7-4} = imm8{3-0}; 195 !strconcat(op, "\t$vrz, ${imm8}"), []> { 196 bits<10> imm8; 201 let Inst{24-21} = imm8{7-4}; 206 let Inst{7-4} = imm8{3-0};
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H A D | CSKYInstrFormatsF1.td | 146 bits<8> imm8; 148 let Inst{24 - 21} = imm8{7 - 4}; //imm4h 152 let Inst{7 - 4} = imm8{3 - 0}; // imm4l 173 bits<8> imm8; 175 let Inst{24 - 21} = imm8{7 - 4}; //imm4h 179 let Inst{7 - 4} = imm8{3 - 0}; // imm4l 202 : F_I8_XY_MEM<sop, sop_su, (outs regtype:$vrz), (ins GPR:$rx, operand:$imm8), 203 !strconcat(op#op_su, "\t$vrz, ($rx, ${imm8})"), []>; 212 : F_I8_XY_MEM<sop, sop_su, (outs), (ins regtype:$vrz, GPR:$rx, operand:$imm8), 213 !strconcat(op#op_su, "\t$vrz, ($rx, ${imm8})"), []>;
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H A D | CSKYInstrInfo16Instr.td | 94 let isAdd = 1, Pattern = [(set mGPR:$rz, (add mGPR:$rZ, oimm8:$imm8))] in 95 def ADDI16 : I16_Z_8<0b100, (ins mGPR:$rZ, oimm8:$imm8), "addi16\t$rz, $imm8">; 96 let Pattern = [(set mGPR:$rz, (sub mGPR:$rZ, oimm8:$imm8))] in 97 def SUBI16 : I16_Z_8<0b101, (ins mGPR:$rZ, oimm8:$imm8), "subi16\t$rz, $imm8">; 104 def ADDI16ZSP : I16_Z_8<0b011, (ins GPRSP:$sp, uimm8_2:$imm8), 105 "addi16\t$rz, $sp, $imm8">; 126 (ins mGPR:$rx, uimm8:$imm8), "rsubi16 $rd, $rx, $imm8", []>; 171 def MOVI16 : I16_Z_8<0b110, (ins uimm8:$imm8), "movi16\t$rz, $imm8"> { 175 let Pattern = [(set mGPR:$rz, uimm8:$imm8)];
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H A D | CSKYInstrInfoF2.td | 61 def f2FLD_S : F2_LDST_S<0b0, "fld", (outs FPR32Op:$vrz), (ins GPR:$rx, uimm8_2:$imm8)>; 63 def f2FLD_D : F2_LDST_D<0b0, "fld", (outs FPR64Op:$vrz), (ins GPR:$rx, uimm8_2:$imm8)>; 66 def f2FST_S : F2_LDST_S<0b1, "fst", (outs), (ins FPR32Op:$vrz, GPR:$rx, uimm8_2:$imm8)>; 68 def f2FST_D : F2_LDST_D<0b1, "fst", (outs), (ins FPR64Op:$vrz, GPR:$rx, uimm8_2:$imm8)>; 106 def f2FLRW_S : F2_LRW<0b00, 0b0, "flrw.32", (outs FPR32Op:$vrz), (ins fconstpool_symbol:$imm8)>; 107 def f2FLRW_D : F2_LRW<0b01, 0b0, "flrw.64", (outs FPR64Op:$vrz), (ins fconstpool_symbol:$imm8)>;
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H A D | CSKYInstrFormats16Instr.td | 129 bits<8> imm8; 133 let Inst{7 - 0} = imm8;
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrFormatsC.td | 264 bits<8> imm8; 268 let Inst{12-5} = imm8; 352 bits<8> imm8; 356 let Inst{12} = imm8{7}; 357 let Inst{11-10} = imm8{3-2}; 359 let Inst{6-5} = imm8{6-5}; 360 let Inst{4-3} = imm8{1-0}; 361 let Inst{2} = imm8{4};
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H A D | RISCVInstrInfoC.td | 773 uimm8:$imm8), 774 "$opcode, $funct3, $rd, $imm8">; 798 simm9_lsb0:$imm8), 799 "$opcode, $funct3, $rs1, $imm8">; 823 def : InstAlias<".insn_ciw $opcode, $funct3, $rd, $imm8", 825 uimm8:$imm8)>; 844 def : InstAlias<".insn_cb $opcode, $funct3, $rs1, $imm8", 846 simm9_lsb0:$imm8)>;
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | ARMUtils.h | 354 const uint32_t imm8 = bits(opcode, 7, 0); in ThumbImm12() local 355 const uint32_t imm12 = i << 11 | imm3 << 8 | imm8; in ThumbImm12() 367 const uint32_t imm8 = bits(opcode, 7, 0); in ThumbImm8Scaled() local 368 return imm8 * 4; in ThumbImm8Scaled()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrThumb.td | 173 // t_addrmode_pc := <label> => pc + imm8 * 4 275 // t_addrmode_sp := sp + imm8 * 4 399 // ADD <Rd>, sp, #<imm8> 961 bits<8> imm8; 963 let Inst{7-0} = imm8; 987 (ins tGPR:$Rn, imm0_255_expr:$imm8), IIC_iALUi, 988 "add", "\t$Rdn, $imm8", 989 [(set tGPR:$Rdn, (add tGPR:$Rn, imm0_255_expr:$imm8))]>, 1022 def tADDSi8 : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, imm0_255_expr:$imm8), 1025 imm0_255_expr:$imm8))]>, [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips16InstrFormats.td | 114 // Format RI instruction class in Mips : <|opcode|rx|imm8|> 122 bits<8> imm8; 127 let Inst{7-0} = imm8; 314 // Format i8 instruction class in Mips : <|opcode|funct|imm8> 322 bits<8> imm8; 328 let Inst{7-0} = imm8;
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H A D | Mips16InstrInfo.td | 64 FI816<_func, (outs), (ins simm16:$imm8), !strconcat(asmstr, asmstr2), 69 FI816_ins_base<_func, asmstr, "\t$imm8 # 16 bit inst", itin>; 73 FI816_ins_base<_func, asmstr, "\t$$sp, $imm8 # 16 bit inst", itin>; 82 FRI16<op, (outs CPU16Regs:$rx), (ins simm16:$imm8), 87 FRI16_ins_base<op, asmstr, "\t$rx, $imm8 \t# 16 bit inst", itin>; 91 FRI16<_op, (outs CPU16Regs:$rx), (ins pcrel16:$imm8, i32imm:$size), 92 !strconcat(asmstr, "\t$rx, $imm8\t# 16 bit inst"), [], itin>; 96 FRI16<op, (outs), (ins CPU16Regs:$rx, simm16:$imm8), 101 FRI16R_ins_base<op, asmstr, "\t$rx, $imm8 \t# 16 bit inst", itin>; 105 FRI16<_op, (outs CPU16Regs:$rx), (ins CPU16Regs:$rx_, simm16:$imm8), [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrUtils.td | 175 /// Imm8Operand - This is the operand kind to use for an imm8 of this type. 177 /// only used for instructions that have a sign-extended imm8 field form. 1096 // BinOpRI8 - Instructions that read "reg, imm8". 1102 // BinOpRI8_F - Instructions that read "reg, imm8" and write EFLAGS only. 1105 // BinOpRI8_R - Instructions that read "reg, imm8" and write "reg". 1108 // BinOpRI8_RF - Instructions that read "reg, imm8" and write "reg", EFLAGS. 1133 // BinOpMR_F - Instructions that read "[mem], imm8" and write EFLAGS only. 1235 // BinOpMI8 - Instructions that read "[mem], imm8". 1248 // BinOpMI8_F - Instructions that read "[mem], imm8" and write EFLAGS only. 1251 // BinOpMI8_R - Instructions that read "[mem], imm8" and write "reg". [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Support/BLAKE3/ |
H A D | blake3_sse2.c | 81 INLINE __m128i blend_epi16(__m128i a, __m128i b, const int16_t imm8) { in blend_epi16() argument 83 __m128i mask = _mm_set1_epi16(imm8); in blend_epi16()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
H A D | X86Disassembler.cpp | 1541 uint8_t imm8; in readImmediate() local 1555 if (consume(insn, imm8)) in readImmediate() 1557 insn->immediates[insn->numImmediatesConsumed] = imm8; in readImmediate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | SVEInstrFormats.td | 1739 : I<(outs ZPR8:$Zdn), (ins ZPR8:$_Zdn, ZPR8:$Zm, imm0_255:$imm8), 1740 asm, "\t$Zdn, $_Zdn, $Zm, $imm8", 1744 bits<8> imm8; 1746 let Inst{20-16} = imm8{7-3}; 1748 let Inst{12-10} = imm8{2-0}; 1766 : I<(outs ZPR8:$Zd), (ins ZZ_b:$Zn, imm0_255:$imm8), 1767 asm, "\t$Zd, $Zn, $imm8", 1771 bits<8> imm8; 1773 let Inst{20-16} = imm8{7-3}; 1775 let Inst{12-10} = imm8{2-0}; [all …]
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