| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoXMips.td | 45 bits<7> imm7; 51 let Inst{26-23} = imm7{6-3}; 62 bits<7> imm7; 68 let Inst{26-22} = imm7{6-2}; 79 bits<7> imm7; 85 let Inst{26-25} = imm7{6-5}; 89 let Inst{11-10} = imm7{4-3}; 97 bits<7> imm7; 103 let Inst{26-25} = imm7{6-5}; 107 let Inst{11-9} = imm7{4-2}; [all …]
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| H A D | RISCVInstrInfoZimop.td | 14 class RVInstIMopr<bits<7> imm7, bits<5> imm5, bits<3> funct3, RISCVOpcode opcode, 17 let Inst{31} = imm7{6}; 19 let Inst{29-28} = imm7{5-4}; 21 let Inst{25-22} = imm7{3-0}; 45 class RVMopr<bits<7> imm7, bits<5> imm5, bits<3> funct3, 47 : RVInstIMopr<imm7, imm5, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1),
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrFormats16Instr.td | 162 AddrModeNone, (outs GPRSP:$sp2), (ins GPRSP:$sp1, uimm7_2:$imm7), 163 !strconcat(opstr, "\t$sp2, $sp1, $imm7"), []> { 164 bits<7> imm7; 167 let Inst{9, 8} = imm7{6,5}; 169 let Inst{4 - 0} = imm7{4 - 0};
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaInstrFormats.td | 189 bits<7> imm7; 192 let Inst{15-12} = imm7{3-0}; 195 let Inst{6-4} = imm7{6-4};
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| H A D | XtensaInstrInfo.td | 664 def MOVI_N : RI7_Inst<0xc, 0x0, (outs AR:$s), (ins imm32n_95:$imm7), 665 "movi.n\t$s, $imm7", 666 [(set AR:$s, imm32n_95:$imm7)]>, Requires<[HasDensity]>; 668 def : InstAlias<"_movi.n\t$s, $imm7", (MOVI_N AR:$s, imm32n_95:$imm7)>;
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMUtils.h | 361 const uint32_t imm7 = bits(opcode, 6, 0); in ThumbImm7Scaled() local 362 return imm7 * 4; in ThumbImm7Scaled()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchLASXInstrFormats.td | 248 bits<7> imm7; 253 let Inst{16-10} = imm7;
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| H A D | LoongArchLSXInstrFormats.td | 276 bits<7> imm7; 281 let Inst{16-10} = imm7;
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| H A D | LoongArchLASXInstrInfo.td | 171 : Fmt2RI7_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm7), 172 "$xd, $xj, $imm7">;
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| H A D | LoongArchLSXInstrInfo.td | 378 : Fmt2RI7_VVI<op, (outs LSX128:$dst), (ins LSX128:$vd, LSX128:$vj, ImmOpnd:$imm7), 379 "$vd, $vj, $imm7">;
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
| H A D | EmulateInstructionARM64.cpp | 700 uint32_t imm7 = Bits32(opcode, 21, 15); in EmulateLDPSTP() local 768 idx = LSL(llvm::SignExtend64<7>(imm7), scale); in EmulateLDPSTP()
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| /freebsd/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | RISCV.cpp | 369 uint16_t imm7 = extractBits(val, 7, 7) << 6; in relocate() local 372 insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5; in relocate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb.td | 421 // ADD sp, sp, #<imm7> 431 // SUB sp, sp, #<imm7>
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| H A D | ARMInstrMVE.td | 118 // taddrmode_imm7 := reg[r0-r7] +/- (imm7 << shift) 136 // t2addrmode_imm7 := reg +/- (imm7)
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| H A D | ARMInstrThumb2.td | 302 // t2addrmode_imm7s4 := reg +/- (imm7 << 2)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | SVEInstrFormats.td | 5786 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, immtype:$imm7), 5787 asm, "\t$Pd, $Pg/z, $Zn, $imm7", 5793 bits<7> imm7; 5797 let Inst{20-14} = imm7;
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