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Searched refs:imm2 (Results 1 – 22 of 22) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLASXInstrFormats.td89 bits<2> imm2;
94 let Inst{11-10} = imm2;
103 bits<2> imm2;
108 let Inst{11-10} = imm2;
117 bits<2> imm2;
122 let Inst{11-10} = imm2;
278 bits<2> imm2;
284 let Inst{19-18} = imm2;
H A DLoongArchLSXInstrFormats.td117 bits<2> imm2;
122 let Inst{11-10} = imm2;
131 bits<2> imm2;
136 let Inst{11-10} = imm2;
145 bits<2> imm2;
150 let Inst{11-10} = imm2;
323 bits<2> imm2;
329 let Inst{19-18} = imm2;
H A DLoongArchInstrFormats.td90 bits<2> imm2;
96 let Inst{16-15} = imm2;
H A DLoongArchLASXInstrInfo.td72 : Fmt2RI2_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm2),
73 "$xd, $xj, $imm2">;
76 : Fmt2RI2_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm2),
77 "$rd, $xj, $imm2">;
114 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2),
115 "$xd, $rj, $imm8, $imm2">;
148 : Fmt2RI2_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm2),
149 "$xd, $xj, $imm2">;
155 : Fmt2RI2_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm2),
156 "$xd, $rj, $imm2">;
H A DLoongArchInstrInfo.td679 : Fmt3RI2<op, (outs GPR:$rd), (ins GPR:$rj, GPR:$rk, ImmOpnd:$imm2),
680 "$rd, $rj, $rk, $imm2">;
1415 def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
1416 (ALSL_W GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
1419 def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
1420 (ALSL_D GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
1421 def : Pat<(sext_inreg (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)), i32),
1422 (ALSL_W GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
1423 def : Pat<(loongarch_bstrpick (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
1425 (ALSL_WU GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
H A DLoongArchLSXInstrInfo.td284 : Fmt2RI2_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm2),
285 "$vd, $vj, $imm2">;
288 : Fmt2RI2_RVI<op, (outs GPR:$rd), (ins LSX128:$vj, ImmOpnd:$imm2),
289 "$rd, $vj, $imm2">;
327 (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2),
328 "$vd, $rj, $imm8, $imm2">;
359 : Fmt2RI2_VRI<op, (outs LSX128:$dst), (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm2),
360 "$vd, $rj, $imm2">;
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td145 (ins GPR:$rx, operand:$imm2),
146 !strconcat(op, "\t$rx, $imm2"), pattern> {
148 bits<2> imm2;
152 let Inst{1 - 0} = imm2;
H A DCSKYInstrInfo.td1072 def TRAP32 : CSKY32Inst<AddrModeNone, 0x30, (outs), (ins uimm2:$imm2), "trap32 ${imm2}", []> {
1073 bits<2> imm2;
1078 let Inst{11 - 10} = imm2;
/freebsd/sys/i386/i386/
H A Ddb_disasm.c1162 int imm2; in db_disasm() local
1494 get_value_inc(imm2, loc, 2, false); /* segment */ in db_disasm()
1495 db_printf("$%#r,%#r", imm2, imm); in db_disasm()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips32r6InstrFormats.td519 bits<2> imm2;
528 let Inst{7-6} = imm2;
H A DMicroMips32r6InstrFormats.td362 bits<2> imm2;
370 let Inst{10-9} = imm2;
H A DMips32r6InstrInfo.td763 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
764 string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $imm2");
H A DMicroMips32r6InstrInfo.td555 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
556 string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $rd, $imm2");
H A DMipsFastISel.cpp230 unsigned Op0, uint64_t imm1, uint64_t imm2, in fastEmitInst_riir() argument
/freebsd/sys/amd64/amd64/
H A Ddb_disasm.c1247 int imm2; in db_disasm() local
1735 get_value_inc(imm2, loc, 2, false); /* segment */ in db_disasm()
1736 db_printf("$%#r,%#r", imm2, imm); in db_disasm()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
H A DCombine.td1096 (match (G_CONSTANT $mask, $imm2),
1622 (G_VSCALE $right, $imm2),
1762 (match (G_CONSTANT $c2, $imm2),
1772 (match (G_CONSTANT $c2, $imm2),
1782 (match (G_CONSTANT $c2, $imm2),
1792 (match (G_CONSTANT $c2, $imm2),
1802 (match (G_CONSTANT $c2, $imm2),
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.td140 def EXTUI : RRR_Inst<0x00, 0x04, 0x00, (outs AR:$r), (ins AR:$t, uimm5:$imm1, imm1_16:$imm2),
141 "extui\t$r, $t, $imm1, $imm2",
142 [(set AR:$r, (Xtensa_extui AR:$t, uimm5:$imm1, imm1_16:$imm2))]> {
144 bits<4> imm2;
148 let Inst{23-20} = imm2;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DSMEInstrFormats.td2409 def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm2], $Zn, $Zm",
2410 …NAME #_HtoS) MatrixOp32:$ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm2s2range:$imm2, ZZ_h_mul_r:$Zn, ZZ…
2456 def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm2], $Zn, $Zm",
2457 …NAME #_HtoS) MatrixOp32:$ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm2s2range:$imm2, ZZZZ_h_mul_r:$Zn, …
3057 (ins MatrixOp16:$_ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm2s2range:$imm2,
3059 mnemonic, "\t$ZAda[$Rv, $imm2, " # !if(vg4, "vgx4", "vgx2") # "], $Zn, $Zm$i",
3064 bits<2> imm2;
3075 let Inst{1-0} = imm2;
3090 def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm2], $Zn, $Zm$i",
3091 … (!cast<Instruction>(NAME) MatrixOp16:$ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm2s2range:$imm2,
[all …]
H A DSVEInstrFormats.td9305 (ins ZZ_b_mul_r:$_Zdn, ZPR128:$Zm, VectorIndexS32b_timm:$imm2),
9307 "\t$Zdn, $_Zdn, $Zm$imm2",
9312 bits<2> imm2;
9314 let Inst{20-19} = imm2;
9329 (ins ZZZZ_b_mul_r:$_Zdn, ZPR128:$Zm, VectorIndexS32b_timm:$imm2),
9331 "\t$Zdn, $_Zdn, $Zm$imm2",
9336 bits<2> imm2;
9338 let Inst{20-19} = imm2;
9947 bits<2> imm2;
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1646 MCOperand imm2(MCOperand::createExpr(Expr)); // lower 32 in processInstruction() local
1647 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, imm, imm2); in processInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrThumb2.td343 // t2addrmode_so_reg := reg + (reg << imm2)
763 let Inst{7-6} = 0b00; // imm2
849 let Inst{7-6} = 0b00; // imm2
1006 let Inst{7-6} = 0b00; // imm2
1048 let Inst{7-6} = 0b00; // imm2
1168 let Inst{7-6} = 0b00; // imm2
1975 let Inst{5-4} = addr{1-0}; // imm2
2990 let Inst{7-6} = 0b00; // imm2
3510 let Inst{7-6} = 0b00; // imm2
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrFormats.td3487 ImmOpWithPattern imm1, ImmOpWithPattern imm2>
3488 : InstIE<opcode, (outs), (ins imm1:$I1, imm2:$I2),