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Searched refs:hypctx_sys_reg (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/arm64/vmm/
H A Dvmm_reset.c63 *hypctx_sys_reg(el2ctx, SCTLR_EL1) = SCTLR_RES1; in reset_vm_el01_regs()
64 *hypctx_sys_reg(el2ctx, SCTLR_EL1) &= ~SCTLR_M & ~SCTLR_C & ~SCTLR_I; in reset_vm_el01_regs()
65 *hypctx_sys_reg(el2ctx, SCTLR_EL1) |= SCTLR_CP15BEN; in reset_vm_el01_regs()
103 *hypctx_sys_reg(el2ctx, HOST_HCR_EL2) |= HCR_E2H; in reset_vm_el2_regs()
112 *hypctx_sys_reg(el2ctx, HOST_MDCR_EL2) |= in reset_vm_el2_regs()
117 *hypctx_sys_reg(el2ctx, HOST_VMPIDR_EL2) &= in reset_vm_el2_regs()
127 *hypctx_sys_reg(el2ctx, HOST_VMPIDR_EL2) |= cpu_aff; in reset_vm_el2_regs()
132 *hypctx_sys_reg(el2ctx, HOST_VPIDR_EL2) |= CPU_VAR_TO_MIDR(0); in reset_vm_el2_regs()
133 *hypctx_sys_reg(el2ctx, HOST_VPIDR_EL2) |= CPU_ARCH_TO_MIDR(0xf); in reset_vm_el2_regs()
134 *hypctx_sys_reg(el2ctx, HOST_VPIDR_EL2) |= CPU_PART_TO_MIDR( in reset_vm_el2_regs()
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H A Dvmm_arm64.c1146 *hypctx_sys_reg(hypctx, HOST_SPSR_EL2) |= PSR_DAIF | in vmmops_run()
1155 *hypctx_sys_reg(hypctx, in vmmops_run()
1159 *hypctx_sys_reg(hypctx, in vmmops_run()
1162 *hypctx_sys_reg(hypctx, in vmmops_run()
1223 *hypctx_sys_reg(hypctx, HOST_ELR_EL2) += vme->inst_length; in vmmops_run()
1284 return hypctx_sys_reg(hypctx, GPR_X(reg)); in hypctx_regptr()
1286 return hypctx_sys_reg(hypctx, GPR_LR); in hypctx_regptr()
1288 return hypctx_sys_reg(hypctx, HOST_SP_EL1); in hypctx_regptr()
1290 return hypctx_sys_reg(hypctx, HOST_SPSR_EL2); in hypctx_regptr()
1292 return hypctx_sys_reg(hypctx, HOST_ELR_EL2); in hypctx_regptr()
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H A Darm64.h320 hypctx_sys_reg(struct hypctx *hypctx, int reg /* enum hypctx_sysreg */) in hypctx_sys_reg() function
334 *hypctx_sys_reg(hypctx, reg) = val; in hypctx_write_sys_reg()
340 return (*hypctx_sys_reg(hypctx, reg)); in hypctx_read_sys_reg()
/freebsd/sys/arm64/vmm/io/
H A Dvtimer.c193 *hypctx_sys_reg(hypctx, HOST_CNTHCTL_EL2) |= in vtimer_cpuinit()
199 *hypctx_sys_reg(hypctx, HOST_CNTHCTL_EL2) |= in vtimer_cpuinit()
223 *hypctx_sys_reg(hypctx, HOST_CNTHCTL_EL2) |= CNTHCTL_ECV_EN; in vtimer_cpuinit()
H A Dvgic_v3.c437 *hypctx_sys_reg(hypctx, HOST_ICH_VMCR_EL2) &= ~ICH_VMCR_EL2_VEOIM; in vgic_v3_cpuinit()
438 *hypctx_sys_reg(hypctx, HOST_ICH_VMCR_EL2) |= ICH_VMCR_EL2_VENG0 | in vgic_v3_cpuinit()
1958 *hypctx_sys_reg(hypctx, HOST_ICH_HCR_EL2) &= ~ICH_HCR_EL2_UIE; in vgic_v3_flush_hwstate()
1990 *hypctx_sys_reg(hypctx, HOST_ICH_LR_EL2(i)) |= in vgic_v3_flush_hwstate()
1997 *hypctx_sys_reg(hypctx, HOST_ICH_LR_EL2(i)) |= ICH_LR_EL2_EOI; in vgic_v3_flush_hwstate()
2001 *hypctx_sys_reg(hypctx, HOST_ICH_LR_EL2(i)) |= in vgic_v3_flush_hwstate()
2091 *hypctx_sys_reg(hypctx, HOST_ICH_HCR_EL2) &= ~ICH_HCR_EL2_EOICOUNT_MASK; in vgic_v3_sync_hwstate()