Searched refs:hw_ecap (Results 1 – 7 of 7) sorted by relevance
/freebsd/sys/x86/iommu/ |
H A D | intel_dmar.h | 121 uint64_t hw_ecap; member 158 #define DMAR_IS_COHERENT(dmar) (((dmar)->hw_ecap & DMAR_ECAP_C) != 0) 159 #define DMAR_HAS_QI(dmar) (((dmar)->hw_ecap & DMAR_ECAP_QI) != 0) 161 (x2apic_mode && ((dmar)->hw_ecap & DMAR_ECAP_EIM) != 0)
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H A D | intel_ctx.c | 168 (unit->hw_ecap & DMAR_ECAP_PT) != 0) { in ctx_id_entry_init() 202 if ((dmar->hw_ecap & DMAR_ECAP_DI) != 0 || force) in dmar_flush_for_ctx_entry() 207 if (error == 0 && ((dmar->hw_ecap & DMAR_ECAP_DI) != 0 || force)) in dmar_flush_for_ctx_entry() 400 if ((dmar->hw_ecap & DMAR_ECAP_PT) == 0) { in dmar_domain_alloc() 790 if ((dmar->hw_ecap & DMAR_ECAP_DI) != 0) { in dmar_free_ctx_locked()
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H A D | intel_drv.c | 350 ecaphi = unit->hw_ecap >> 32; in dmar_print_caps() 351 device_printf(dev, "ecap=%b,", (u_int)unit->hw_ecap, in dmar_print_caps() 355 printf("mhmw=%d, iro=%d\n", DMAR_ECAP_MHMV(unit->hw_ecap), in dmar_print_caps() 356 DMAR_ECAP_IRO(unit->hw_ecap)); in dmar_print_caps() 388 unit->hw_ecap = dmar_read8(unit, DMAR_ECAP_REG); in dmar_attach() 484 if ((unit->hw_ecap & DMAR_ECAP_DI) != 0) { in dmar_attach()
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H A D | intel_idpgtbl.c | 517 (unit->hw_ecap & DMAR_ECAP_SC) != 0, in dmar_map_buf() 521 (unit->hw_ecap & DMAR_ECAP_DI) != 0, in dmar_map_buf() 715 KASSERT((domain->dmar->hw_ecap & DMAR_ECAP_PT) != 0 && in dmar_domain_free_pgtbl() 767 iro = DMAR_ECAP_IRO(unit->hw_ecap) * 16; in dmar_flush_iotlb_sync()
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H A D | intel_quirks.c | 160 unit->hw_ecap &= ~(DMAR_ECAP_IR | DMAR_ECAP_EIM); in nb_no_ir()
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H A D | intel_intrmap.c | 326 if ((unit->hw_ecap & DMAR_ECAP_IR) == 0) in dmar_init_irt()
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H A D | intel_utils.c | 322 reg = 16 * DMAR_ECAP_IRO(unit->hw_ecap); in dmar_inv_iotlb_glob()
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