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Searched refs:hasVGPRs (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h227 return hasSGPRs(RC) && !hasVGPRs(RC) && !hasAGPRs(RC); in isSGPRClass()
246 return hasVGPRs(RC) && !hasAGPRs(RC) && !hasSGPRs(RC); in isVGPRClass()
251 return hasAGPRs(RC) && !hasVGPRs(RC) && !hasSGPRs(RC); in isAGPRClass()
256 return hasVGPRs(RC) && hasAGPRs(RC) && !hasSGPRs(RC); in isVectorSuperClass()
261 return hasVGPRs(RC) && hasSGPRs(RC) && !hasAGPRs(RC); in isVSSuperClass()
265 static bool hasVGPRs(const TargetRegisterClass *RC) { in hasVGPRs() function
281 return hasVGPRs(RC) || hasAGPRs(RC); in hasVectorRegisters()
H A DSIInstrInfo.cpp1085 else if (RI.hasVGPRs(SrcRC) || in copyPhysReg()
1090 } else if (RI.hasVGPRs(RC) && RI.isAGPRClass(SrcRC)) { in copyPhysReg()
1092 } else if ((Size % 64 == 0) && RI.hasVGPRs(RC) && in copyPhysReg()
2347 if (RI.hasVGPRs(EltRC)) { in expandPostRAPseudo()
3299 return RI.hasVGPRs(RC) && NumInsts <= 6; in canInsertSelect()
4969 if (!MO.isReg() || !RI.hasVGPRs(RI.getRegClassForReg(MRI, MO.getReg()))) { in verifyInstruction()
6953 if (RI.hasVGPRs(DstRC)) { in legalizeOperands()