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Searched refs:hasImplicitDefOfPhysReg (Results 1 – 12 of 12) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCInstrDesc.cpp32 bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, in hasImplicitDefOfPhysReg() function in MCInstrDesc
51 return hasImplicitDefOfPhysReg(Reg, &RI); in hasDefOfPhysReg()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h593 bool hasImplicitDefOfPhysReg(unsigned Reg,
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp767 (Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC) || in needsImpliedVcc()
768 Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC_LO)); in needsImpliedVcc()
784 (Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC) || in printOperand()
785 Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC_LO))) in printOperand()
H A DAMDGPUMCCodeEmitter.cpp359 Desc.hasImplicitDefOfPhysReg(AMDGPU::EXEC); in isVCMPX64()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86DomainReassignment.cpp146 !TII->get(DstOpcode).hasImplicitDefOfPhysReg(MO.getReg())) in isLegal()
H A DX86InstrInfo.cpp10568 MI.getDesc().hasImplicitDefOfPhysReg(X86::RSP)) in getOutliningTypeImpl()
10574 MI.getDesc().hasImplicitDefOfPhysReg(X86::RIP)) in getOutliningTypeImpl()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp132 if (ResNo >= II.getNumDefs() && II.hasImplicitDefOfPhysReg(Reg)) in CheckForPhysRegDependency()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp1384 get(MemOpcode).hasImplicitDefOfPhysReg(SystemZ::CC))) in foldMemoryOperandImpl()
1557 if (get(RegMemOpcode).hasImplicitDefOfPhysReg(SystemZ::CC)) { in foldMemoryOperandImpl()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DScheduleDAGInstrs.cpp250 !DefMIDesc.hasImplicitDefOfPhysReg(Reg)); in addPhysRegDataDeps()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp4726 if (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) && in getPredicationCost()
4756 if (PredCost && (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) && in getInstrLatency()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp2902 MI.getDesc().hasImplicitDefOfPhysReg(RISCV::X5)) in getOutliningTypeImpl()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp16493 if (II.isCompare() && II.hasImplicitDefOfPhysReg(AMDGPU::SCC)) { in checkForPhysRegDependency()