Home
last modified time | relevance | path

Searched refs:hasAVX512 (Results 1 – 21 of 21) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86Subtarget.h201 bool hasAVX512() const { return X86SSELevel >= AVX512; } in hasAVX512() function
233 return hasAVX512() && hasEVEX512() && in canExtendTo512DQ()
254 return hasAVX512() && hasEVEX512() && in useAVX512Regs()
H A DX86RegisterInfo.cpp141 if (!Subtarget.hasAVX512() && in getLargestLegalSuperClass()
162 if (Subtarget.hasAVX512() && in getLargestLegalSuperClass()
288 bool HasAVX512 = Subtarget.hasAVX512(); in getCalleeSavedRegs()
430 bool HasAVX512 = Subtarget.hasAVX512(); in getCallPreservedMask()
623 if (!Is64Bit || !MF.getSubtarget<X86Subtarget>().hasAVX512()) { in getReservedRegs()
675 if (ST.hasAVX512()) in getNumSupportedRegs()
H A DX86InstrPredicates.td78 def HasAVX512 : Predicate<"Subtarget->hasAVX512()">;
79 def UseAVX : Predicate<"Subtarget->hasAVX() && !Subtarget->hasAVX512()">;
80 def UseAVX2 : Predicate<"Subtarget->hasAVX2() && !Subtarget->hasAVX512()">;
81 def NoAVX512 : Predicate<"!Subtarget->hasAVX512()">;
H A DX86LegalizerInfo.cpp
H A DX86InstructionSelector.cpp
H A DX86FastISel.cpp325 bool HasAVX512 = Subtarget->hasAVX512(); in X86FastEmitLoad()
486 bool HasAVX512 = Subtarget->hasAVX512(); in X86FastEmitStore()
1358 bool HasAVX512 = Subtarget->hasAVX512(); in X86ChooseCmpOpcode()
2204 if (Subtarget->hasAVX512()) { in X86FastEmitSSESelect()
2288 Opc = Subtarget->hasAVX512() ? X86::CMOV_FR16X : X86::CMOV_FR16; break; in X86FastEmitPseudoSelect()
2290 Opc = Subtarget->hasAVX512() ? X86::CMOV_FR32X : X86::CMOV_FR32; break; in X86FastEmitPseudoSelect()
2292 Opc = Subtarget->hasAVX512() ? X86::CMOV_FR64X : X86::CMOV_FR64; break; in X86FastEmitPseudoSelect()
2403 bool HasAVX512 = Subtarget->hasAVX512(); in X86SelectIntToFP()
2495 bool HasAVX512 = Subtarget->hasAVX512(); in X86SelectFPExt()
2509 bool HasAVX512 = Subtarget->hasAVX512(); in X86SelectFPTrunc()
[all …]
H A DX86EvexToVex.cpp
H A DX86ISelLoweringCall.cpp107 if (VT.getVectorElementType() == MVT::i1 && Subtarget.hasAVX512()) { in getRegisterTypeForCallingConv()
143 if (VT.getVectorElementType() == MVT::i1 && Subtarget.hasAVX512()) { in getNumRegistersForCallingConv()
180 Subtarget.hasAVX512() && in getVectorTypeBreakdownForCallingConv()
214 if (Subtarget.hasAVX512()) { in getSetCCResultType()
305 if (Op.size() >= 64 && Subtarget.hasAVX512() && Subtarget.hasEVEX512() && in getOptimalMemOpType()
419 if (Subtarget.hasAVX512() && Subtarget.hasEVEX512()) in allowsMemoryAccess()
1770 RC = Subtarget.hasAVX512() ? &X86::FR16XRegClass : &X86::FR16RegClass; in LowerFormalArguments()
1772 RC = Subtarget.hasAVX512() ? &X86::FR32XRegClass : &X86::FR32RegClass; in LowerFormalArguments()
1774 RC = Subtarget.hasAVX512() ? &X86::FR64XRegClass : &X86::FR64RegClass; in LowerFormalArguments()
H A DX86TargetTransformInfo.cpp170 if (Vector && ST->hasAVX512()) in getNumberOfRegisters()
209 if (ST->hasAVX512() && ST->hasEVEX512() && PreferVectorWidth >= 512) in getRegisterBitWidth()
446 if (Op2Info.isUniform() && Op2Info.isConstant() && ST->hasAVX512()) in getArithmeticInstrCost()
602 if (Op2Info.isConstant() && ST->hasAVX512()) in getArithmeticInstrCost()
725 if (ST->hasAVX512() && Op2Info.isUniform()) in getArithmeticInstrCost()
982 if (ST->hasAVX512()) in getArithmeticInstrCost()
1002 if (ST->hasAVX512()) { in getArithmeticInstrCost()
1950 if (ST->hasAVX512()) in getShuffleCost()
3130 if (ST->hasAVX512()) in getCastInstrCost()
3149 if (ST->hasAVX512()) in getCastInstrCost()
[all …]
H A DX86CompressEVEX.cpp314 if (!ST.hasAVX512() && !ST.hasEGPR() && !ST.hasNDD()) in runOnMachineFunction()
H A DX86ISelLowering.cpp646 addRegisterClass(MVT::f16, Subtarget.hasAVX512() ? &X86::FR16XRegClass in X86TargetLowering()
648 addRegisterClass(MVT::f32, Subtarget.hasAVX512() ? &X86::FR32XRegClass in X86TargetLowering()
650 addRegisterClass(MVT::f64, Subtarget.hasAVX512() ? &X86::FR64XRegClass in X86TargetLowering()
1280 if (!Subtarget.hasAVX512()) in X86TargetLowering()
1406 if (Subtarget.is64Bit() && !Subtarget.hasAVX512()) { in X86TargetLowering()
1511 if (!Subtarget.hasAVX512()) in X86TargetLowering()
1721 if (!Subtarget.useSoftFloat() && Subtarget.hasAVX512()) { in X86TargetLowering()
2098 if (!Subtarget.useSoftFloat() && Subtarget.hasAVX512()) { in X86TargetLowering()
2413 addRegisterClass(MVT::v8bf16, Subtarget.hasAVX512() ? &X86::VR128XRegClass in X86TargetLowering()
2415 addRegisterClass(MVT::v16bf16, Subtarget.hasAVX512() ? &X86::VR256XRegClass in X86TargetLowering()
[all …]
H A DX86PreTileConfig.cpp422 if (ST.hasAVX512()) { in runOnMachineFunction()
H A DX86CallingConv.td159 CCIfSubtarget<"hasAVX512()",CCAssignToReg<RC.ZMM>>>,
230 CCIfSubtarget<"hasAVX512()", CCAssignToReg<RC.ZMM>>>
589 CCIfSubtarget<"hasAVX512()",
709 CCIfSubtarget<"hasAVX512()",
H A DX86FastPreTileConfig.cpp166 if (ST->hasAVX512()) { in InitializeTileConfigStackSpace()
H A DX86DomainReassignment.cpp781 if (!STI->hasAVX512() || !STI->hasBWI()) in runOnMachineFunction()
H A DX86FixupVectorConstants.cpp349 bool MultiDomain = ST->hasAVX512() || ST->hasNoDomainDelayMov(); in processInstruction()
H A DX86InstrInfo.cpp4220 bool HasAVX512 = Subtarget.hasAVX512(); in CopyToFromAsymmetricReg()
4402 return STI.hasAVX512() ? X86::VMOVSSZrm in getLoadStoreOpcodeForFP16()
4406 return STI.hasAVX512() ? X86::VMOVSSZmr in getLoadStoreOpcodeForFP16()
4416 bool HasAVX512 = STI.hasAVX512(); in getLoadStoreRegOpcode()
4533 assert(STI.hasAVX512() && "Using 512-bit register requires AVX512"); in getLoadStoreRegOpcode()
8410 assert(STI.hasAVX512() && "Expected at least AVX512!"); in getBroadcastOpcode()
9361 assert(Subtarget.hasAVX512() && "Requires AVX-512"); in setExecutionDomain()
10751 if (!ST.hasAVX512()) in buildClearRegister()
H A DX86SpeculativeLoadHardening.cpp1695 assert(Subtarget->hasAVX512() && "AVX512-specific register classes!"); in hardenLoadAddr()
H A DX86ISelDAGToDAG.cpp592 return Subtarget->hasAVX512(); in useNonTemporalLoad()
4716 if (!NVT.isVector() || !Subtarget->hasAVX512() || in tryVPTERNLOG()
4929 assert(Subtarget->hasAVX512() && "Expected AVX512!"); in tryVPTESTM()
5101 if (!NVT.isVector() || !Subtarget->hasAVX512()) in tryMatchBitSelect()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp189 return STI.hasAVX512() ? &X86::FR16XRegClass : &X86::FR16RegClass; in getRegClass()
191 return STI.hasAVX512() ? &X86::FR32XRegClass : &X86::FR32RegClass; in getRegClass()
193 return STI.hasAVX512() ? &X86::FR64XRegClass : &X86::FR64RegClass; in getRegClass()
195 return STI.hasAVX512() ? &X86::VR128XRegClass : &X86::VR128RegClass; in getRegClass()
197 return STI.hasAVX512() ? &X86::VR256XRegClass : &X86::VR256RegClass; in getRegClass()
478 bool HasAVX512 = STI.hasAVX512(); in getLoadStoreOp()
1293 bool HasAVX512 = STI.hasAVX512(); in selectExtract()
1426 bool HasAVX512 = STI.hasAVX512(); in selectInsert()
H A DX86LegalizerInfo.cpp42 bool HasAVX512 = Subtarget.hasAVX512(); in X86LegalizerInfo()
44 bool HasDQI = Subtarget.hasAVX512() && Subtarget.hasDQI(); in X86LegalizerInfo()
45 bool HasBWI = Subtarget.hasAVX512() && Subtarget.hasBWI(); in X86LegalizerInfo()