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Searched refs:has16BitInsts (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp340 return (ElemWidth == 16 && ST->has16BitInsts()) ? 2 in getMaximumVF()
550 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()
565 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()
576 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()
592 if (ST->has16BitInsts() && SLT == MVT::f16 && !HasFP64FP16Denormals) in getArithmeticInstrCost()
611 if (ST->has16BitInsts() && SLT == MVT::f16) in getArithmeticInstrCost()
635 (SLT == MVT::f16 && ST->has16BitInsts())) { in getArithmeticInstrCost()
640 if (SLT == MVT::f16 && ST->has16BitInsts()) { in getArithmeticInstrCost()
724 if ((ST->has16BitInsts() && SLT == MVT::f16) || in getIntrinsicInstrCost()
822 if (EltSize == 16 && Index == 0 && ST->has16BitInsts()) in getVectorInstrCost()
H A DAMDGPUSubtarget.h154 bool has16BitInsts() const { in has16BitInsts() function
H A DAMDGPUCodeGenPrepare.cpp425 (Ty->isHalfTy() && ST->has16BitInsts()); in isLegalFloatingTy()
635 if (Size <= 16 && ST->has16BitInsts()) in replaceMulWithMul24()
1548 if (ST->has16BitInsts() && needsPromotionToI32(I.getType()) && in visitBinaryOperator()
1680 if (ST->has16BitInsts() && needsPromotionToI32(I.getOperand(0)->getType()) && in visitICmpInst()
1694 if (ST->has16BitInsts() && needsPromotionToI32(I.getType())) { in visitSelectInst()
2113 if (ST->has16BitInsts() && needsPromotionToI32(I.getType()) && in visitBitreverseIntrinsicInst()
2207 if (!Ty->isFloatTy() && (!Ty->isHalfTy() || ST->has16BitInsts())) in visitSqrt()
H A DAMDGPULegalizerInfo.cpp700 const LLT MinScalarFPTy = ST.has16BitInsts() ? S16 : S32; in AMDGPULegalizerInfo()
767 } else if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()
929 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()
953 } else if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()
968 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
972 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
976 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
984 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()
1052 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()
1082 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()
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H A DAMDGPUISelLowering.cpp411 if (Subtarget->has16BitInsts()) in AMDGPUTargetLowering()
807 (ScalarVT == MVT::f16 && Subtarget->has16BitInsts())); in isFPImmLegal()
948 (Subtarget->has16BitInsts() && (VT == MVT::f16 || VT == MVT::bf16)); in isFAbsFree()
991 if (DestSize== 16 && Subtarget->has16BitInsts()) in isTruncateFree()
1001 if (SrcSize == 16 && Subtarget->has16BitInsts()) in isZExtFree()
2663 assert(!Subtarget->has16BitInsts()); in LowerFLOG2()
2704 if (VT == MVT::f16 && !Subtarget->has16BitInsts()) { in LowerFLOGCommon()
2710 if (VT == MVT::f16 && !Subtarget->has16BitInsts()) { in LowerFLOGCommon()
2843 assert(!Subtarget->has16BitInsts()); in lowerFEXP2()
3378 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) { in LowerUINT_TO_FP()
[all …]
H A DSIISelLowering.cpp151 if (Subtarget->has16BitInsts()) { in SITargetLowering()
474 if (Subtarget->has16BitInsts()) { in SITargetLowering()
551 if (Subtarget->has16BitInsts()) { in SITargetLowering()
822 if (Subtarget->has16BitInsts()) { in SITargetLowering()
925 if (Subtarget->has16BitInsts() && !Subtarget->hasMed3_16()) in SITargetLowering()
1014 if (Subtarget->has16BitInsts()) { in getRegisterTypeForCallingConv()
1023 return Subtarget->has16BitInsts() ? MVT::i16 : MVT::i32; in getRegisterTypeForCallingConv()
1045 if (Size == 16 && Subtarget->has16BitInsts()) in getNumRegistersForCallingConv()
1070 if (Size == 16 && Subtarget->has16BitInsts()) { in getVectorTypeBreakdownForCallingConv()
1089 if (Size < 16 && Subtarget->has16BitInsts()) { in getVectorTypeBreakdownForCallingConv()
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H A DSIInstrInfo.cpp4202 return ST.has16BitInsts() && in isInlineConstant()
4221 return ST.has16BitInsts() && in isInlineConstant()
4224 return ST.has16BitInsts() && in isInlineConstant()
4300 return ST.has16BitInsts() && in isInlineConstant()
4312 return ST.has16BitInsts() && in isInlineConstant()
H A DAMDGPU.td2042 def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
H A DAMDGPUInstructionSelector.cpp1089 if (Size == 16 && !ST.has16BitInsts()) in getV_CMPOpcode()