Searched refs:getZeroVector (Results 1 – 2 of 2) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3864 static SDValue getZeroVector(MVT VT, const X86Subtarget &Subtarget, in getZeroVector() function 4009 SDValue Res = ZeroNewElements ? getZeroVector(VT, Subtarget, DAG, dl) in widenSubVector() 4690 ? getZeroVector(VT, Subtarget, DAG, SDLoc(V2)) : DAG.getUNDEF(VT); in getShuffleVectorZeroOrUndef() 6523 V = getZeroVector(VT, Subtarget, DAG, DL); in LowerBuildVectorAsInsert() 6606 V = getZeroVector(MVT::v8i16, Subtarget, DAG, DL); in LowerBuildVectorv16i8() 6716 : getZeroVector(VT, Subtarget, DAG, DL); in LowerBuildVectorv4x32() 8567 getZeroVector(IndicesVT.getSimpleVT(), Subtarget, DAG, DL), in createVariablePermute() 8834 return getZeroVector(VT, Subtarget, DAG, dl); in LowerBUILD_VECTOR() 9125 Ops[i] = getZeroVector(VT, Subtarget, DAG, dl); in LowerBUILD_VECTOR() 9259 SDValue Vec = NumZero ? getZeroVector(ResVT, Subtarget, DAG, dl) in LowerAVXCONCAT_VECTORS() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 6310 static SDValue getZeroVector(EVT VT, SelectionDAG &DAG, const SDLoc &dl) { in getZeroVector() function 6526 SDValue NX = DAG.getNode(ISD::SUB, dl, VT, getZeroVector(VT, DAG, dl), X); in LowerCTTZ() 6697 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1)); in LowerShift()
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