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Searched refs:getVectorNumElements (Results 1 – 25 of 59) sorted by relevance

123

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp229 VT.getVectorNumElements() / 2); in scaleVectorType()
259 unsigned NumOfElm = VT.getVectorNumElements(); in genShuffleBland()
436 int VF = VT.getVectorNumElements(); in createShuffleStride()
449 int VF = VT.getVectorNumElements() / std::max(VectorSize / 128, 1); in setGroupSize()
473 unsigned NumElts = VT.getVectorNumElements(); in DecodePALIGNRMask()
608 int VF = VT.getVectorNumElements(); in group2Shuffle()
676 unsigned NumOfElm = VT.getVectorNumElements(); in interleave8bitStride3()
H A DX86ISelLowering.cpp2755 if (!VT.isScalableVector() && VT.getVectorNumElements() != 1 && in getPreferredVectorAction()
2759 if (!VT.isScalableVector() && VT.getVectorNumElements() != 1 && in getPreferredVectorAction()
3196 Info.memVT = MVT::getVectorVT(ScalarVT, VT.getVectorNumElements()); in getTgtMemIntrinsic()
3207 unsigned NumElts = std::min(DataVT.getVectorNumElements(), in getTgtMemIntrinsic()
3208 IndexVT.getVectorNumElements()); in getTgtMemIntrinsic()
3219 unsigned NumElts = std::min(DataVT.getVectorNumElements(), in getTgtMemIntrinsic()
3220 IndexVT.getVectorNumElements()); in getTgtMemIntrinsic()
3380 (Index == ResVT.getVectorNumElements())); in isExtractSubvectorCheap()
3382 return (Index % ResVT.getVectorNumElements()) == 0; in isExtractSubvectorCheap()
3989 unsigned NumElts = VT.getVectorNumElements(); in getConstVector()
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H A DX86TargetTransformInfo.cpp301 MVT::getVectorVT(MVT::i16, 2 * LT.second.getVectorNumElements()); in getArithmeticInstrCost()
1492 return 20 * LT.first * LT.second.getVectorNumElements() * ScalarCost; in getArithmeticInstrCost()
1607 int NumElts = LT.second.getVectorNumElements(); in getShuffleCost()
1612 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost()
1631 LT.second.getVectorNumElements()); in getShuffleCost()
1633 SubLT.second.getVectorNumElements()); in getShuffleCost()
1661 int NumElts = DstLT.second.getVectorNumElements(); in getShuffleCost()
1664 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost()
1735 LegalVT.getVectorNumElements() < in getShuffleCost()
1745 LegalVT.getVectorNumElements()); in getShuffleCost()
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H A DX86ISelLoweringCall.cpp108 unsigned NumElts = VT.getVectorNumElements(); in getRegisterTypeForCallingConv()
118 if (VT.getVectorElementType() == MVT::f16 && VT.getVectorNumElements() < 8) in getRegisterTypeForCallingConv()
144 unsigned NumElts = VT.getVectorNumElements(); in getNumRegistersForCallingConv()
154 if (VT.getVectorElementType() == MVT::f16 && VT.getVectorNumElements() < 8) in getNumRegistersForCallingConv()
181 (!isPowerOf2_32(VT.getVectorNumElements()) || in getVectorTypeBreakdownForCallingConv()
182 (VT.getVectorNumElements() == 64 && !Subtarget.hasBWI()) || in getVectorTypeBreakdownForCallingConv()
183 VT.getVectorNumElements() > 64)) { in getVectorTypeBreakdownForCallingConv()
186 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
2014 unsigned NumElems = VT.getVectorNumElements(); in getMOVL()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp385 MVT BoolW = MVT::getVectorVT(MVT::i1, T.getVectorNumElements()); in initializeHVXLowering()
396 MVT BoolV = MVT::getVectorVT(MVT::i1, T.getVectorNumElements()); in initializeHVXLowering()
455 unsigned VecLen = VecTy.getVectorNumElements(); in getPreferredHvxVectorAction()
521 return MVT::getVectorVT(ElemTy, Tys.first.getVectorNumElements() + in typeJoin()
522 Tys.second.getVectorNumElements()); in typeJoin()
528 unsigned NumElem = VecTy.getVectorNumElements(); in typeSplit()
538 return MVT::getVectorVT(NewElemTy, VecTy.getVectorNumElements()); in typeExtElem()
545 return MVT::getVectorVT(NewElemTy, VecTy.getVectorNumElements()); in typeTruncElem()
784 assert(ResTy.getVectorNumElements() == ByteMask.size()); in getByteShuffle()
901 unsigned ExtLen = ExtTy.getVectorNumElements(); in buildHvxVectorReg()
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H A DHexagonISelLowering.cpp166 unsigned NumElts = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
205 const unsigned NumElems = VT.getVectorNumElements(); in handleMaskRegisterForCallingConv()
1128 OpTy.getVectorNumElements()); in LowerSETCC()
1186 OpTy.getVectorNumElements()); in LowerVSELECT()
2213 return SrcTy.getVectorNumElements() <= 8; in isExtractSubvectorCheap()
2468 MVT ExtTy = MVT::getVectorVT(MVT::i16, Ty.getVectorNumElements()); in LowerVECTOR_SHIFT()
2545 assert(VecTy.getVectorNumElements() == Elem.size()); in buildVector32()
2636 assert(VecTy.getVectorNumElements() == Elem.size()); in buildVector64()
2754 assert(VecWidth == VecTy.getVectorNumElements() && in extractVectorPred()
2846 unsigned VecLen = VecTy.getVectorNumElements(); in insertVectorPred()
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H A DHexagonSubtarget.cpp192 unsigned NumElems = VecTy.getVectorNumElements(); in isHVXVectorType()
234 unsigned VecLen = PowerOf2Ceil(Ty.getVectorNumElements()); in isTypeForHVX()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp291 assert(N->getValueType(0).getVectorNumElements() == 1 && in ScalarizeVecRes_UnaryOpWithTwoResults()
859 assert(N->getOperand(1).getValueType().getVectorNumElements() == 1 && in ScalarizeVecOp_FAKE_USE()
868 assert(N->getValueType(0).getVectorNumElements() == 1 && in ScalarizeVecOp_UnaryOp()
881 assert(N->getValueType(0).getVectorNumElements() == 1 && in ScalarizeVecOp_UnaryOpWithExtraInput()
895 assert(N->getValueType(0).getVectorNumElements() == 1 && in ScalarizeVecOp_UnaryOp_StrictFP()
1616 unsigned LoNumElts = LoVT.getVectorNumElements(); in SplitVecRes_BUILD_VECTOR()
1808 unsigned InNumElements = InLoVT.getVectorNumElements(); in SplitVecRes_ExtVecInRegOp()
1812 unsigned OutNumElements = OutLoVT.getVectorNumElements(); in SplitVecRes_ExtVecInRegOp()
1887 unsigned NE = VT.getVectorNumElements(); in UnrollVectorOp_StrictFP()
2770 unsigned NewElts = NewVT.getVectorNumElements(); in SplitVecRes_VECTOR_SHUFFLE()
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H A DLegalizeTypesGeneric.cpp89 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); in ExpandRes_BITCAST()
352 NumElts = N->getValueType(0).getVectorNumElements(); in ExpandOp_BITCAST()
370 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_BUILD_VECTOR()
428 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_INSERT_VECTOR_ELT()
466 unsigned NumElts = VT.getVectorNumElements(); in ExpandOp_SCALAR_TO_VECTOR()
H A DLegalizeVectorOps.cpp828 assert(NVT.getVectorNumElements() == VT.getVectorNumElements() && in PromoteINT_TO_FP()
867 assert(NVT.getVectorNumElements() == VT.getVectorNumElements() && in PromoteFP_TO_INT()
1405 int NumElements = VT.getVectorNumElements(); in ExpandANY_EXTEND_VECTOR_INREG()
1408 int NumSrcElements = SrcVT.getVectorNumElements(); in ExpandANY_EXTEND_VECTOR_INREG()
1463 int NumElements = VT.getVectorNumElements(); in ExpandZERO_EXTEND_VECTOR_INREG()
1466 int NumSrcElements = SrcVT.getVectorNumElements(); in ExpandZERO_EXTEND_VECTOR_INREG()
1497 for (int I = 0, E = VT.getVectorNumElements(); I != E; ++I) in createBSWAPShuffleMask()
2282 unsigned NumElems = VT.getVectorNumElements(); in UnrollStrictFPOp()
2340 unsigned NumElems = VT.getVectorNumElements(); in UnrollVSETCC()
H A DSelectionDAG.cpp1173 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && in verifyNode()
1736 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) in getConstant()
1754 for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i) in getConstant()
2129 for (uint64_t i = 0; i < ResVT.getVectorNumElements(); i++) in getStepVector()
2144 assert(VT.getVectorNumElements() == Mask.size() && in getVectorShuffle()
2259 V.getValueType().getVectorNumElements() == VT.getVectorNumElements(); in getVectorShuffle()
2967 unsigned NumElts = VT.getVectorNumElements(); in computeVectorKnownZeroElements()
3046 unsigned NumElts = VT.getVectorNumElements(); in isSplatValue()
3112 unsigned NumSrcElts = Src.getValueType().getVectorNumElements(); in isSplatValue()
3129 unsigned NumSrcElts = Src.getValueType().getVectorNumElements(); in isSplatValue()
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H A DDAGCombiner.cpp350 ? APInt::getAllOnes(VT.getVectorNumElements()) in SimplifyDemandedBits()
363 unsigned NumElts = Op.getValueType().getVectorNumElements(); in SimplifyDemandedVectorElts()
4856 unsigned NumElts = VT.getVectorNumElements(); in visitMUL()
8343 int NumElts = VT.getVectorNumElements(); in visitOR()
12399 int NumElems = VT.getVectorNumElements(); in ConvertSelectToConcatVector()
12693 unsigned NumElmts = VecVT.getVectorNumElements(); in visitVECTOR_COMPRESS()
13011 unsigned Elts = VT.getVectorNumElements(); in foldVSelectOfConstants()
13784 unsigned NumElts = VT.getVectorNumElements(); in tryToFoldExtendOfConstant()
13939 SplitSrcVT.getVectorNumElements() > 1) { in CombineExtLoad()
13951 DstVT.getVectorNumElements() / SplitDstVT.getVectorNumElements(); in CombineExtLoad()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPISelLowering.cpp25 CDAG.getConstant(Op.getValueType().getVectorNumElements(), MVT::i32); in splitMaskArithmetic()
78 AVL = CDAG.getConstant(OpVecVT.getVectorNumElements(), MVT::i32); in lowerToVVP()
145 AVL = CDAG.getConstant(DataVT.getVectorNumElements(), MVT::i32); in lowerVVP_LOAD_STORE()
291 AVL = CDAG.getConstant(DataVT.getVectorNumElements(), MVT::i32); in lowerVVP_GATHER_SCATTER()
H A DVECustomDAG.cpp25 return SomeVT.getVectorNumElements() > StandardVectorWidth; in isPackedVectorType()
414 auto AVL = getConstant(MaskVT.getVectorNumElements(), MVT::i32); in getConstantMask()
435 unsigned ElemCount = ResultVT.getVectorNumElements(); in getMaskBroadcast()
H A DVEISelDAGToDAG.cpp280 if (SplatResTy.getVectorNumElements() == StandardVectorWidth) { in Select()
283 } else if (SplatResTy.getVectorNumElements() == PackedVectorWidth) { in Select()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h331 unsigned getVectorNumElements() const { in getVectorNumElements() function
340 return isSimple() ? V.getVectorNumElements() in getVectorNumElements()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp402 DataVT.getVectorNumElements() <= 256) && "unhandled case in lowering"); in getVRGatherIndexType()
419 unsigned LegalNumElts = LegalVT.getVectorNumElements(); in costShuffleViaSplitting()
496 divideCeil(Mask.size(), LegalVT.getVectorNumElements()); in costShuffleViaVRegSplitting()
500 LegalVT.getVectorNumElements() >= Tp->getElementCount().getFixedValue()) in costShuffleViaVRegSplitting()
509 LegalVT.getVectorNumElements()); in costShuffleViaVRegSplitting()
513 LegalVT.getVectorNumElements() * std::max(NumOfSrcs, E); in costShuffleViaVRegSplitting()
514 unsigned NumOfSrcRegs = NormalizedVF / LegalVT.getVectorNumElements(); in costShuffleViaVRegSplitting()
515 unsigned NumOfDestRegs = NormalizedVF / LegalVT.getVectorNumElements(); in costShuffleViaVRegSplitting()
692 LT.second.getVectorNumElements() <= 256)) { in getShuffleCost()
712 LT.second.getVectorNumElements() <= 256)) { in getShuffleCost()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp1102 unsigned PossibleBits = VT.getVectorNumElements(); in computeKnownBitsForTargetNode()
2291 ExtractedVecT.getVectorNumElements() / VecT.getVectorNumElements(); in LowerSIGN_EXTEND_INREG()
2512 if (Lane->getOperand(0).getValueType().getVectorNumElements() > in LowerBUILD_VECTOR()
2513 VecT.getVectorNumElements()) in LowerBUILD_VECTOR()
2607 size_t DestLaneCount = VecT.getVectorNumElements(); in LowerBUILD_VECTOR()
2779 size_t NumLanes = Op.getSimpleValueType().getVectorNumElements(); in unrollVectorShift()
2904 SrcType.getVectorNumElements() != DstType.getVectorNumElements()) in performVECTOR_SHUFFLECombine()
3112 VT.getVectorNumElements() / Factor); in extractSubVector()
3144 unsigned NumElems = SrcVT.getVectorNumElements(); in truncateVectorWithNARROW()
3147 assert(DstVT.getVectorNumElements() == NumElems && "Illegal truncation"); in truncateVectorWithNARROW()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp6288 unsigned DstNumElt = DstVT.getVectorNumElements(); in CombineVMOVDRRCandidateWithVecOp()
6304 ExtractSrc.getValueType().getVectorNumElements() * DstNumElt); in CombineVMOVDRRCandidateWithVecOp()
6358 SrcVT.getVectorNumElements() > 1) in ExpandBITCAST()
6881 unsigned CmpElements = CmpVT.getVectorNumElements() * 2; in LowerVSETCC()
7308 unsigned NumElts = VT.getVectorNumElements(); in isSingletonVEXTMask()
7337 unsigned NumElts = VT.getVectorNumElements(); in isVEXTMask()
7411 unsigned NumElts = VT.getVectorNumElements(); in isVTRNMask()
7443 unsigned NumElts = VT.getVectorNumElements(); in isVTRN_v_undef_Mask()
7475 unsigned NumElts = VT.getVectorNumElements(); in isVUZPMask()
7505 unsigned NumElts = VT.getVectorNumElements(); in isVUZP_v_undef_Mask()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp807 return LT.first * (MTy.getVectorNumElements() > 2 ? 4 : 2); in getIntrinsicInstrCost()
826 return LT.first * (MTy.getVectorNumElements() > 4 ? 4 : 2); in getIntrinsicInstrCost()
831 return MTy.getVectorNumElements() * 3; in getIntrinsicInstrCost()
3562 SrcTy.getVectorNumElements() == DstTy.getVectorNumElements() && in getCastInstrCost()
3742 unsigned Width = LT.second.getVectorNumElements(); in getVectorInstrCostHelper()
4049 return VT.getVectorNumElements() * in getArithmeticInstrCost()
4561 VT.getVectorNumElements() >= (128 / EltSize) || Alignment != Align(1)) in getMemoryOpCost()
4565 if (VT.getVectorNumElements() == 3 && EltVT == MVT::i8) in getMemoryOpCost()
4577 unsigned CurrNumElements = CurrVT.getVectorNumElements(); in getMemoryOpCost()
5252 const unsigned NElts = MTy.getVectorNumElements(); in getArithmeticReductionCost()
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H A DAArch64ISelLowering.cpp2147 (ResVT.isFixedLengthVector() && (ResVT.getVectorNumElements() > 16 || in shouldExpandGetActiveLaneMask()
2243 unsigned NumElts = VT.getVectorNumElements(); in addTypeForFixedLengthSVE()
4566 VT.getVectorNumElements()); in LowerVectorFP_TO_INT()
4579 if (InVT.getVectorNumElements() == 1) { in LowerVectorFP_TO_INT()
4656 MVT F32VT = MVT::getVectorVT(MVT::f32, SrcVT.getVectorNumElements()); in LowerVectorFP_TO_INT_SAT()
4674 MVT F64VT = MVT::getVectorVT(MVT::f64, SrcVT.getVectorNumElements()); in LowerVectorFP_TO_INT_SAT()
4890 InVT.getVectorNumElements()); in LowerVectorINT_TO_FP()
4913 if (VT.getVectorNumElements() == 1) { in LowerVectorINT_TO_FP()
5171 if (!VT.isFixedLengthVector() || VT.getVectorNumElements() != 2 || !C) in getConstantLaneNumOfExtractHalfOperand()
10791 VT.getVectorNumElements() >= 2) { in LowerCTPOP_PARITY()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelDAGToDAG.cpp115 unsigned NumVectorElts = VT.getVectorNumElements(); in Select()
H A DAMDGPUISelLowering.cpp1268 assert(ArgVT.getVectorNumElements() > RegisterVT.getVectorNumElements()); in analyzeFormalArgumentsCompute()
1274 ArgVT.getVectorNumElements() == NumRegs) { in analyzeFormalArgumentsCompute()
1288 unsigned NumElements = RegisterVT.getVectorNumElements(); in analyzeFormalArgumentsCompute()
1301 if (MemVT.isVector() && MemVT.getVectorNumElements() == 1) in analyzeFormalArgumentsCompute()
1608 unsigned NumElt = VT.getVectorNumElements(); in LowerEXTRACT_SUBVECTOR()
1609 unsigned NumSrcElt = SrcVT.getVectorNumElements(); in LowerEXTRACT_SUBVECTOR()
1629 VT.getVectorNumElements()); in LowerEXTRACT_SUBVECTOR()
1797 unsigned NumElts = VT.getVectorNumElements(); in getSplitDestVTs()
1812 assert(LoVT.getVectorNumElements() + in splitVector()
1813 (HiVT.isVector() ? HiVT.getVectorNumElements() : 1) <= in splitVector()
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp220 const unsigned NumElts = VectorVT.getVectorNumElements(); in getVectorLoweringShape()
340 unsigned NumElts = VT.getVectorNumElements(); in ComputePTXValueVTs()
362 const auto NumEltsPerReg = PackedVT.getVectorNumElements(); in ComputePTXValueVTs()
1116 if (!VT.isScalableVector() && VT.getVectorNumElements() != 1 && in getPreferredVectorAction()
2054 unsigned NumSubElem = VVT.getVectorNumElements(); in LowerCONCAT_VECTORS()
2159 const unsigned NumElements = VT.getVectorNumElements(); in LowerBUILD_VECTOR()
2192 VectorVT.getVectorNumElements() == 2 && "Unexpected vector type."); in LowerEXTRACT_VECTOR_ELT()
2601 for (int I = 0, E = Op.getValueType().getVectorNumElements(); I < E; I++) { in LowerVectorArith()
2626 for (unsigned J = 0, NElts = ValVT.getVectorNumElements(); J < NElts; J++) in LowerTcgen05St()
3228 assert(NumElts * EltVT.getVectorNumElements() == in LowerSTOREVector()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVISelLowering.cpp68 if (VT.isVector() && VT.getVectorNumElements() == 3 && in getNumRegistersForCallingConv()
83 if (VT.isVector() && VT.getVectorNumElements() == 3) { in getRegisterTypeForCallingConv()

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