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Searched refs:getVectorMinNumElements (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DMachineValueType.h233 unsigned NElts = getVectorMinNumElements(); in isPow2VectorType()
267 unsigned getVectorMinNumElements() const { in getVectorMinNumElements() function
280 return ElementCount::get(getVectorMinNumElements(), isScalableVector()); in getVectorElementCount()
289 return getVectorMinNumElements(); in getVectorNumElements()
/freebsd/contrib/llvm-project/llvm/lib/CodeGenTypes/
H A DLowLevelType.cpp21 bool asVector = VT.getVectorMinNumElements() > 1 || VT.isScalableVector(); in LLT()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h349 unsigned getVectorMinNumElements() const { in getVectorMinNumElements() function
456 unsigned NElts = getVectorMinNumElements(); in isPow2VectorType()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1590 DAG.getVectorIdxConstant(IdxVal + LoVT.getVectorMinNumElements(), dl)); in SplitVecRes_INSERT_SUBVECTOR()
1604 unsigned VecElems = VecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
1605 unsigned SubElems = SubVecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
1606 unsigned LoElems = LoVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
1915 unsigned LoNumElts = Lo.getValueType().getVectorMinNumElements(); in SplitVecRes_INSERT_VECTOR_ELT()
1996 DAG.getVScale(dl, EltVT, StepVal * LoVT.getVectorMinNumElements()); in SplitVecRes_STEP_VECTOR()
3471 uint64_t LoElts = Lo.getValueType().getVectorMinNumElements(); in SplitVecOp_INSERT_SUBVECTOR()
3491 uint64_t LoEltsMin = Lo.getValueType().getVectorMinNumElements(); in SplitVecOp_EXTRACT_SUBVECTOR()
3495 assert(IdxVal + SubVT.getVectorMinNumElements() <= LoEltsMin && in SplitVecOp_EXTRACT_SUBVECTOR()
3549 uint64_t LoElts = Lo.getValueType().getVectorMinNumElements(); in SplitVecOp_EXTRACT_VECTOR_ELT()
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H A DSelectionDAG.cpp3202 if (!isUIntN(BitWidth, Op.getValueType().getVectorMinNumElements())) in computeKnownBits()
3205 APInt(BitWidth, Op.getValueType().getVectorMinNumElements()); in computeKnownBits()
5335 return KnownIdx.getMaxValue().uge(VecVT.getVectorMinNumElements()); in canCreateUndefOrPoison()
5822 unsigned IdentityIndex = i * Op.getValueType().getVectorMinNumElements(); in foldCONCAT_VECTORS()
6125 assert(VT.getVectorMinNumElements() < in getNode()
6126 N1.getValueType().getVectorMinNumElements() && in getNode()
7291 VT.getVectorMinNumElements() <= N1VT.getVectorMinNumElements()) && in getNode()
7295 (VT.getVectorMinNumElements() + N2C->getZExtValue()) <= in getNode()
7296 N1VT.getVectorMinNumElements()) && in getNode()
7314 unsigned Factor = VT.getVectorMinNumElements(); in getNode()
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H A DDAGCombiner.cpp14715 unsigned DstElts = N0.getValueType().getVectorMinNumElements(); in visitSIGN_EXTEND_INREG()
14716 unsigned SrcElts = N00.getValueType().getVectorMinNumElements(); in visitSIGN_EXTEND_INREG()
17263 NumElts = VT.getVectorMinNumElements(); in combineRepeatedFPDivisors()
24327 N->getOperand(0).getValueType().getVectorMinNumElements(); in visitCONCAT_VECTORS()
24375 (IndexC->getZExtValue() % SubVT.getVectorMinNumElements()) == 0) { in getSubVectorSrc()
24376 uint64_t SubIdx = IndexC->getZExtValue() / SubVT.getVectorMinNumElements(); in getSubVectorSrc()
24568 unsigned NumElts = VT.getVectorMinNumElements(); in narrowExtractedVectorLoad()
24571 if (Index == 0 && NumElts >= Ld->getValueType(0).getVectorMinNumElements()) in narrowExtractedVectorLoad()
24800 unsigned NumInsElts = InsSubVT.getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR()
24802 unsigned NumSubElts = NVT.getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR()
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H A DSelectionDAGBuilder.cpp819 unsigned IntermediateNumElts = IntermediateVT.getVectorMinNumElements(); in getCopyToPartsVector()
7994 unsigned Stride = ReducedTy.getVectorMinNumElements(); in visitIntrinsicCall()
7995 unsigned ScaleFactor = FullTy.getVectorMinNumElements() / Stride; in visitIntrinsicCall()
12418 unsigned NumElts = VT.getVectorMinNumElements(); in visitVectorReverse()
12431 unsigned OutNumElts = OutVT.getVectorMinNumElements(); in visitVectorDeinterleave()
12467 unsigned NumElts = InVT.getVectorMinNumElements(); in visitVectorInterleave()
H A DLegalizeIntegerTypes.cpp5743 unsigned NElts = NInVT.getVectorMinNumElements(); in PromoteIntRes_EXTRACT_SUBVECTOR()
5922 unsigned NumOutElem = NOutVT.getVectorMinNumElements(); in PromoteIntRes_CONCAT_VECTORS()
6121 unsigned OpNumElts = Op.getValueType().getVectorMinNumElements(); in PromoteIntOp_CONCAT_VECTORS()
H A DTargetLowering.cpp10113 unsigned NElts = VecVT.getVectorMinNumElements(); in clampDynamicVectorIndex()
11417 if (TrailingElts > VT.getVectorMinNumElements()) { in expandVectorSplice()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp79 unsigned VL = VT.getVectorMinNumElements(); in getRISCVInstructionCost()
86 unsigned VL = VT.getVectorMinNumElements(); in getRISCVInstructionCost()
H A DRISCVISelLowering.cpp169 if (VT.getVectorMinNumElements() < MinElts) in RISCVTargetLowering()
4086 unsigned NumOpElts = M1VT.getVectorMinNumElements(); in lowerBUILD_VECTOR()
5053 unsigned NumOpElts = M1VT.getVectorMinNumElements(); in lowerShuffleViaVRegSplitting()
6895 Op.getOperand(0).getSimpleValueType().getVectorMinNumElements(); in LowerOperation()
10030 if (VecVT.getVectorMinNumElements() >= 8 && in lowerINSERT_SUBVECTOR()
10031 SubVecVT.getVectorMinNumElements() >= 8) { in lowerINSERT_SUBVECTOR()
10033 assert(VecVT.getVectorMinNumElements() % 8 == 0 && in lowerINSERT_SUBVECTOR()
10034 SubVecVT.getVectorMinNumElements() % 8 == 0 && in lowerINSERT_SUBVECTOR()
10038 MVT::getVectorVT(MVT::i8, SubVecVT.getVectorMinNumElements() / 8, in lowerINSERT_SUBVECTOR()
10040 VecVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorMinNumElements() / in lowerINSERT_SUBVECTOR()
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenDAGPatterns.cpp666 return B.getVectorMinNumElements() < P.getVectorMinNumElements(); in EnforceVectorSubVectorTypeIs()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp215 switch (VT.getVectorMinNumElements()) { in getPromotedVTForPredicate()
5393 unsigned ElementSize = 128 / Op.getValueType().getVectorMinNumElements(); in optimizeIncrementingWhile()
6107 return DataVT.isFixedLengthVector() || DataVT.getVectorMinNumElements() > 2; in shouldRemoveExtendFromGSIndex()
10685 unsigned BlockSize = AArch64::SVEBitsPerBlock / Ty.getVectorMinNumElements(); in LowerVECTOR_SPLICE()
13643 unsigned NumElts = N.getValueType().getVectorMinNumElements(); in isAllActivePredicate()
13650 if (N.getValueType().getVectorMinNumElements() < NumElts) in isAllActivePredicate()
13662 return N.getValueType().getVectorMinNumElements() >= NumElts; in isAllActivePredicate()
14582 unsigned NumElts = VT.getVectorMinNumElements(); in LowerINSERT_SUBVECTOR()
14627 assert(Idx == InVT.getVectorMinNumElements() && in LowerINSERT_SUBVECTOR()
17597 return (Index == 0 || Index == ResVT.getVectorMinNumElements()); in isExtractSubvectorCheap()
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H A DAArch64TargetTransformInfo.cpp2419 DstTyL.first * DstTyL.second.getVectorMinNumElements(); in isWideningInstruction()
2421 SrcTyL.first * SrcTyL.second.getVectorMinNumElements(); in isWideningInstruction()
H A DAArch64ISelDAGToDAG.cpp1780 unsigned Key = VT.getVectorMinNumElements(); in SelectOpcodeFromVT()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1011 unsigned Index = NarrowVT.getVectorMinNumElements(); in PreprocessISelDAG()
1039 unsigned Index = NarrowVT.getVectorMinNumElements(); in PreprocessISelDAG()
H A DX86ISelLowering.cpp43523 *DAG.getContext(), LowerOp.getValueType().getVectorMinNumElements()); in combineBitcastvxi1()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2206 unsigned VecLen = VT.getVectorMinNumElements(); in getPreferredVectorAction()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp17140 128 / AVT.getVectorMinNumElements())), in PerformVECREDUCE_ADDCombine()