| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2876 return DAG.getInsertSubvector(DL, DAG.getUNDEF(VT), V, 0); in convertToScalableVector() 3138 DAG.getUNDEF(Mask.getValueType()), Mask, VL}); in lowerFP_TO_INT_SAT() 3169 RISCVISD::VMV_V_X_VL, DL, DstContainerVT, DAG.getUNDEF(DstContainerVT), in lowerFP_TO_INT_SAT() 3172 Res, DAG.getUNDEF(DstContainerVT), VL); in lowerFP_TO_INT_SAT() 3294 DAG.getUNDEF(ContainerVT), MaxValNode, VL); in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND() 3381 DAG.getUNDEF(MaskVT), Mask, VL}); in lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND() 3402 DAG.getUNDEF(ContainerVT), MaxValNode, VL); in lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND() 3736 Src = DAG.getInsertSubvector(DL, DAG.getUNDEF(ContainerVT), Src, 0); in matchSplatAsGather() 3743 Idx, DAG.getUNDEF(ContainerVT), Mask, VL); in matchSplatAsGather() 3901 Vec = DAG.getNode(OpCode, DL, ContainerVT, DAG.getUNDEF(ContainerVT), Vec, in lowerBuildVectorViaDominantValues() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.h | 180 SDValue getUNDEF(EVT VT) const { return DAG.getUNDEF(VT); } in getUNDEF() function
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 464 N->getBasePtr(), DAG.getUNDEF(N->getBasePtr().getValueType()), in ScalarizeVecRes_LOAD() 647 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); in ScalarizeVecRes_UNDEF() 654 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); in ScalarizeVecRes_VECTOR_SHUFFLE() 1826 InHi = DAG.getVectorShuffle(InLoVT, dl, InLo, DAG.getUNDEF(InLoVT), SplitHi); in SplitVecRes_ExtVecInRegOp() 1927 Scalars.push_back(DAG.getUNDEF(EltVT)); in UnrollVectorOp_StrictFP() 2086 Hi = DAG.getUNDEF(HiVT); in SplitVecRes_ScalarOp() 2113 SDValue Offset = DAG.getUNDEF(Ptr.getValueType()); in SplitVecRes_LOAD() 2526 SDValue UndefPassthru = DAG.getUNDEF(LoVT); in SplitVecRes_VECTOR_COMPRESS() 2785 SmallVector<SDValue> Ops(NewElts, DAG.getUNDEF(EltVT)); in SplitVecRes_VECTOR_SHUFFLE() 3081 [&Output, &DAG = DAG, NewVT]() { Output = DAG.getUNDEF(NewVT); }, in SplitVecRes_VECTOR_SHUFFLE() [all …]
|
| H A D | SelectionDAG.cpp | 2151 return getUNDEF(VT); in getVectorShuffle() 2165 N2 = getUNDEF(VT); in getVectorShuffle() 2219 return getUNDEF(VT); in getVectorShuffle() 2221 N2 = getUNDEF(VT); in getVectorShuffle() 2223 N1 = getUNDEF(VT); in getVectorShuffle() 2230 return getUNDEF(VT); in getVectorShuffle() 2256 return getUNDEF(VT); in getVectorShuffle() 2778 return getUNDEF(VT); in FoldSetCC() 3214 return getUNDEF(VT); in getSplatSourceVector() 6168 return DAG.getUNDEF(VT); in FoldBUILD_VECTOR() [all …]
|
| H A D | LegalizeTypesGeneric.cpp | 469 SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType()); in ExpandOp_SCALAR_TO_VECTOR() 589 Lo = DAG.getUNDEF(LoVT); in SplitRes_UNDEF() 590 Hi = DAG.getUNDEF(HiVT); in SplitRes_UNDEF()
|
| H A D | DAGCombiner.cpp | 3449 DAG.getUNDEF(CarryVT)); in visitADDO() 4543 DAG.getUNDEF(CarryVT)); in visitSUBO() 5005 return DAG.getUNDEF(VT); in simplifyDivRem() 11100 return DAG.getUNDEF(VT); in visitSRL() 12712 : DAG.getUNDEF(ScalarVT); in visitVECTOR_COMPRESS() 13790 Elts.push_back(DAG.getUNDEF(SVT)); in tryToFoldExtendOfConstant() 15042 return DAG.getUNDEF(VT); in visitANY_EXTEND() 15813 ? DAG.getUNDEF(VT) in visitEXTEND_VECTOR_INREG() 15956 return DAG.getUNDEF(VT); in visitTRUNCATE() 16194 return DAG.getUNDEF(VT); in visitTRUNCATE() [all …]
|
| H A D | LegalizeVectorOps.cpp | 1418 Src = DAG.getInsertSubvector(DL, DAG.getUNDEF(SrcVT), Src, 0); in ExpandANY_EXTEND_VECTOR_INREG() 1433 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG() 1476 Src = DAG.getInsertSubvector(DL, DAG.getUNDEF(SrcVT), Src, 0); in ExpandZERO_EXTEND_VECTOR_INREG() 1518 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), ShuffleMask); in ExpandBSWAP() 1562 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), in ExpandBITREVERSE()
|
| H A D | SelectionDAGBuilder.cpp | 468 return DAG.getUNDEF(ValueVT); in getCopyFromPartsVector() 671 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, PartVT, DAG.getUNDEF(PartVT), in widenVectorToPartType() 678 SDValue EltUndef = DAG.getUNDEF(PartEVT); in widenVectorToPartType() 1835 return isa<PoisonValue>(C) ? DAG.getPOISON(VT) : DAG.getUNDEF(VT); in getValueImpl() 1888 Constants[i] = DAG.getUNDEF(EltVT); in getValueImpl() 4133 ConcatOps.push_back(DAG.getUNDEF(SrcVT)); in visitShuffleVector() 4150 SDValue UndefVal = DAG.getUNDEF(SrcVT); in visitShuffleVector() 4210 setValue(&I, DAG.getUNDEF(VT)); // Vectors are not used. in visitShuffleVector() 4218 Src = DAG.getUNDEF(VT); in visitShuffleVector() 4247 Res = DAG.getUNDEF(EltVT); in visitShuffleVector() [all …]
|
| H A D | LegalizeDAG.cpp | 1007 SDValue UndefNode = DAG.getUNDEF(Node->getValueType(0)); in LegalizeOp() 1982 Vec2 = DAG.getUNDEF(VT); in ExpandBVWithShuffles() 2034 return DAG.getUNDEF(VT); in ExpandBUILD_VECTOR() 2097 Vec2 = DAG.getUNDEF(VT); in ExpandBUILD_VECTOR() 2135 Callee = DAG.getUNDEF(CodePtrTy); in ExpandLibCall() 3601 Ops.push_back(DAG.getUNDEF(EltVT)); in ExpandNode() 3701 Results.push_back(DAG.getUNDEF(Node->getValueType(0))); in ExpandNode() 4895 Results.push_back(DAG.getUNDEF(Node->getValueType(0))); in ConvertNodeToLibcall() 5993 SDValue Undef = DAG.getUNDEF(MidVT); in PromoteNode()
|
| H A D | StatepointLowering.cpp | 1038 ActualCallee = DAG.getUNDEF(Callee.getValueType()); in LowerStatepoint()
|
| H A D | TargetLowering.cpp | 712 return DAG.getUNDEF(VT); in SimplifyMultipleUseDemandedBits() 963 return DAG.getUNDEF(Op.getValueType()); in SimplifyMultipleUseDemandedBits() 1211 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedBits() 1223 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedBits() 3139 return DAG.getUNDEF(EltVT); in getKnownUndefForVectorBinop() 3205 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedVectorElts() 3236 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedVectorElts() 3393 Ops[i] = TLO.DAG.getUNDEF(Ops[0].getValueType()); in SimplifyDemandedVectorElts() 3467 TLO.DAG.getUNDEF(VT), Sub, in SimplifyDemandedVectorElts() 3613 LHS = FoldLHS ? TLO.DAG.getUNDEF(LHS.getValueType()) : LHS; in SimplifyDemandedVectorElts() [all …]
|
| H A D | LegalizeIntegerTypes.cpp | 592 DAG.getUNDEF(WideVecVT), InOp, in PromoteIntRes_BITCAST() 1888 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), in PromoteIntRes_UNDEF() 3882 Hi = DAG.getUNDEF(NVT); // The high part is undefined. in ExpandIntRes_ANY_EXTEND() 4308 Hi = DAG.getUNDEF(NVT); in ExpandIntRes_LOAD() 6394 SDValue ResVec = DAG.getUNDEF(ResVT); in PromoteIntOp_CONCAT_VECTORS()
|
| H A D | LegalizeFloatTypes.cpp | 1053 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), in SoftenFloatRes_UNDEF() 3232 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), in PromoteFloatRes_UNDEF() 3655 return DAG.getUNDEF(MVT::i16); in SoftPromoteHalfRes_UNDEF()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 839 return DAG.getUNDEF(VecTy); in buildHvxVectorReg() 927 DAG.getUNDEF(ExtTy), Mask); in buildHvxVectorReg() 1029 SDValue S = DAG.getVectorShuffle(ByteTy, dl, T, DAG.getUNDEF(ByteTy), Mask); in createHvxPrefixPred() 1051 ? DAG.getUNDEF(MVT::i64) in createHvxPrefixPred() 1077 SDValue Vec = ZeroFill ? getZero(dl, ByteTy, DAG) : DAG.getUNDEF(ByteTy); in createHvxPrefixPred() 1121 : DAG.getUNDEF(MVT::i8); in buildHvxVectorPred() 1141 : DAG.getUNDEF(MVT::i8); in buildHvxVectorPred() 1322 SDValue Undef = DAG.getUNDEF(ByteTy); in extractHvxSubvectorPred() 1576 DAG.getVectorShuffle(ByteTy, dl, Vor, DAG.getUNDEF(ByteTy), Mask); in compressHvxPred() 1717 V = DAG.getUNDEF(NTy); in LowerHvxConcatVectors() [all …]
|
| H A D | HexagonISelLowering.cpp | 2035 return DAG.getMergeValues({DAG.getUNDEF(ty(Op)), Trap}, dl); in replaceMemWithUndef() 2302 return DAG.getUNDEF(VecTy); in LowerVECTOR_SHUFFLE() 2556 return DAG.getUNDEF(VecTy); in buildVector32() 2647 return DAG.getUNDEF(VecTy); in buildVector64() 2868 ValR = getCombine(DAG.getUNDEF(MVT::i32), ValR, dl, MVT::i64, DAG); in insertVectorPred() 2884 return DAG.getUNDEF(MVT::i64); in expandPredicate() 2895 return DAG.getUNDEF(MVT::i32); in contractPredicate() 2898 SDValue S = DAG.getVectorShuffle(MVT::v8i8, dl, A, DAG.getUNDEF(MVT::v8i8), in contractPredicate() 2938 Concats.push_back(DAG.getUNDEF(ValTy)); in appendUndef() 3049 W = getCombine(DAG.getUNDEF(MVT::i32), W, dl, MVT::i64, DAG); in LowerCONCAT_VECTORS()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3999 SDValue OpNode = IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector() 4003 Ops.push_back(IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector() 4031 Ops.append(Split ? 2 : 1, DAG.getUNDEF(EltVT)); in getConstVector() 4133 return DAG.getUNDEF(ResultVT); in extractSubVector() 4211 : DAG.getUNDEF(VT); in widenSubVector() 4271 Ops.push_back(DAG.getUNDEF(SubVT)); in collectConcatOps() 4302 Ops.push_back(DAG.getUNDEF(SubVT)); in collectConcatOps() 4596 SDValue Undef = DAG.getUNDEF(WideOpVT); in insert1BitVector() 4730 SDValue V = insertSubVector(DAG.getUNDEF(VT), V1, 0, DAG, dl, SubVectorWidth); in concatSubVectors() 4829 SmallVector<SDValue> Ops(Mask.size(), DAG.getUNDEF(VT.getScalarType())); in getVectorShuffle() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4389 Pg, SrcVal, DAG.getUNDEF(MVT::nxv2f32)); in LowerFP_ROUND() 6499 SDValue Ops[] = {Chain, DAG.getUNDEF(VT), Mask, BasePtr, Index, Scale}; in LowerMGATHER() 6557 PassThru = PassThru->isUndef() ? DAG.getUNDEF(ContainerVT) in LowerMGATHER() 6677 LoadNode->getOffset(), Mask, DAG.getUNDEF(VT), LoadNode->getMemoryVT(), in LowerMLOAD() 6702 SDValue Undef = DAG.getUNDEF(MVT::i16); in LowerTruncateVectorStore() 6953 DAG.getUNDEF(ScalableVecVT), Vec, in LowerVECTOR_COMPRESS() 6956 DAG.getUNDEF(ScalableMaskVT), Mask, in LowerVECTOR_COMPRESS() 6961 DAG.getUNDEF(ScalableVecVT), Passthru, in LowerVECTOR_COMPRESS() 7117 DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, XVT, DAG.getUNDEF(XVT), X, Zero); in LowerFLDEXP() 7119 DAG.getUNDEF(ExpVT), Exp, Zero); in LowerFLDEXP() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1516 DAG.getConstant(PartOffset, DL, MVT::i32), DAG.getUNDEF(MVT::i32), in LowerFormalArguments() 1584 NewBldVec[i] = DAG.getUNDEF(MVT::f32); in CompactSwizzlableVector() 1587 NewBldVec[i] = DAG.getUNDEF(MVT::f32); in CompactSwizzlableVector() 1596 NewBldVec[i] = DAG.getUNDEF(NewBldVec[i].getValueType()); in CompactSwizzlableVector() 1795 Ops.append(NElts, DAG.getUNDEF(InVal.getValueType())); in PerformDAGCombine()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 284 SDValue getUNDEF(const SDLoc &DL, EVT VT) const; 966 SDValue SystemZDAGToDAGISel::getUNDEF(const SDLoc &DL, EVT VT) const { in getUNDEF() function in SystemZDAGToDAGISel 975 DL, VT, getUNDEF(DL, MVT::i64), N); in convertTo() 1080 getUNDEF(DL, OpcodeVT), in tryRISBGZero()
|
| H A D | SystemZISelLowering.cpp | 1823 Value = DAG.getBuildVector(MVT::v2i64, DL, {Value, DAG.getUNDEF(MVT::i64)}); in convertLocVTToValVT() 3666 Op = DAG.getVectorShuffle(MVT::v4f32, DL, Op, DAG.getUNDEF(MVT::v4f32), Mask); in expandV4F32ToV2F64() 5839 IndexNodes[I] = DAG.getUNDEF(MVT::i32); in getGeneralPermuteNode() 5857 IndexNodes[I] = DAG.getUNDEF(MVT::i32); in getGeneralPermuteNode() 5970 return DAG.getUNDEF(VT); in getNode() 5977 Ops.push_back(DAG.getUNDEF(MVT::v16i8)); in getNode() 6189 return DAG.getUNDEF(VT); in buildScalarToVector() 6199 return DAG.getUNDEF(VT); in buildMergeScalars() 6214 return DAG.getUNDEF(MVT::v2i64); in joinDwords() 6270 ResidueOps.push_back(DAG.getUNDEF(ResidueOps[0].getValueType())); in tryBuildVectorShuffle() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 867 SDValue Vector = DAG.getUNDEF(OpVT); in lowerSCALAR_TO_VECTOR() 912 return DAG.getVectorShuffle(ResTy, DL, Res, DAG.getUNDEF(ResTy), Mask); in lowerBITREVERSE() 1365 return DAG.getUNDEF(VT); in lowerVECTOR_SHUFFLE_VREPLVEI() 1806 return DAG.getUNDEF(VT); in lowerVECTOR_SHUFFLE_XVREPLVEI() 2201 DAG.getUNDEF(MVT::v4i64), {2, 3, 0, 1}); in lowerVECTOR_SHUFFLEAsLanePermuteAndShuffle() 2287 return DAG.getUNDEF(VT); in lowerVECTOR_SHUFFLE() 2520 SDValue Vector = DAG.getUNDEF(ResTy); in lowerBUILD_VECTOR() 2578 : (NumFreezeUndef ? DAG.getFreeze(DAG.getUNDEF(ResVT)) in lowerCONCAT_VECTORS() 2579 : DAG.getUNDEF(ResVT)); in lowerCONCAT_VECTORS() 3395 return DAG.getMergeValues({DAG.getUNDEF(Op.getValueType()), Op.getOperand(0)}, in emitIntrinsicWithChainErrorMessage() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1323 SDValue ArgVal = DAG.getUNDEF(PtrVT); in LowerCall() 1331 SDValue ArgVal = DAG.getUNDEF(PtrVT); in LowerCall() 1545 : DAG.getUNDEF(In.VT)); in LowerFormalArguments() 2611 SDValue Src2 = ShuffleSrc2 ? ShuffleSrc2 : DAG.getUNDEF(VecT); in LowerBUILD_VECTOR() 2907 SrcType, SDLoc(N), CastOp, DAG.getUNDEF(SrcType), Shuffle->getMask()); in performVECTOR_SHUFFLECombine()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7759 SDValue N1 = DAG.getNode(ARMISD::VCVTN, dl, VT, DAG.getUNDEF(VT), Op0, in LowerBuildVectorOfFPTrunc() 7985 return DAG.getUNDEF(VT); in LowerBUILD_VECTOR() 8087 return DAG.getUNDEF(VT); in LowerBUILD_VECTOR() 8118 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT), in LowerBUILD_VECTOR() 8222 SDValue Vec = DAG.getUNDEF(VT); in LowerBUILD_VECTOR() 8336 DAG.getUNDEF(Src.ShuffleVec.getValueType())); in ReconstructShuffle() 8428 SDValue ShuffleOps[] = { DAG.getUNDEF(ShuffleVT), DAG.getUNDEF(ShuffleVT) }; in ReconstructShuffle() 8706 SDValue PredAsVector2 = V2.isUndef() ? DAG.getUNDEF(NewVT) in LowerVECTOR_SHUFFLE_i1() 9067 Ops.push_back(DAG.getUNDEF(EltVT)); in LowerVECTOR_SHUFFLE() 9288 SDValue Val = DAG.getUNDEF(MVT::v2f64); in LowerCONCAT_VECTORS() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 680 return DAG.getUNDEF(Op->getValueType(0)); in LowerSDIVSREM()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8203 Op2 = DAG.getUNDEF(WideVT); in LowerTRUNCATEVector() 8747 SDValue UndefVec = DAG.getUNDEF(VecVT); in widenVec() 8791 SignedConv ? DAG.getUNDEF(WideVT) : DAG.getConstant(0, dl, WideVT); in LowerINT_TO_FPVector() 9689 SDValue SplatNode = DAG.getUNDEF(MVT::v2i64); in LowerBUILD_VECTOR() 10377 DAG.getUNDEF(MVT::v16i8), Mask)) in LowerROTL() 15557 Ops.push_back(DAG.getUNDEF(SrcVT)); in combineElementTruncationToVectorTruncation() 15565 Ops.push_back(In.isUndef() ? DAG.getUNDEF(SrcVT) : In.getOperand(0)); in combineElementTruncationToVectorTruncation() 15674 DAG.getUNDEF(N->getValueType(0)), Ops); in combineBVOfConsecutiveLoads() 15708 DAG.getUNDEF(Input.getValueType()), ShuffleMask); in addShuffleForVecExtend()
|