| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.h | 180 SDValue getUNDEF(EVT VT) const { return DAG.getUNDEF(VT); } in getUNDEF() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2736 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, DAG.getUNDEF(VT), V, Zero); in convertToScalableVector() 2980 DAG.getUNDEF(Mask.getValueType()), Mask, VL}); in lowerFP_TO_INT_SAT() 2995 RISCVISD::VMV_V_X_VL, DL, DstContainerVT, DAG.getUNDEF(DstContainerVT), in lowerFP_TO_INT_SAT() 2998 Res, DAG.getUNDEF(DstContainerVT), VL); in lowerFP_TO_INT_SAT() 3083 DAG.getUNDEF(ContainerVT), MaxValNode, VL); in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND() 3172 DAG.getUNDEF(MaskVT), Mask, VL}); in lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND() 3193 DAG.getUNDEF(ContainerVT), MaxValNode, VL); in lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND() 3496 Idx, DAG.getUNDEF(ContainerVT), Mask, VL); in matchSplatAsGather() 3586 Vec = DAG.getNode(OpCode, DL, ContainerVT, DAG.getUNDEF(ContainerVT), Vec, in lowerBuildVectorViaDominantValues() 3716 DAG.getNode(Opc, DL, ContainerVT, DAG.getUNDEF(ContainerV in lowerBuildVectorOfConstants() [all...] |
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 456 N->getBasePtr(), DAG.getUNDEF(N->getBasePtr().getValueType()), in ScalarizeVecRes_LOAD() 643 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); in ScalarizeVecRes_VECTOR_SHUFFLE() 650 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); 1749 InHi = DAG.getVectorShuffle(InLoVT, dl, InLo, DAG.getUNDEF(InLoVT), SplitHi); in SplitVecRes_ExtVecInRegOp() 1851 Scalars.push_back(DAG.getUNDEF(EltVT)); in UnrollVectorOp_StrictFP() 2011 Hi = DAG.getUNDEF(HiVT); in SplitVecRes_ScalarOp() 2038 SDValue Offset = DAG.getUNDEF(Ptr.getValueType()); in SplitVecRes_LOAD() 2650 SmallVector<SDValue> Ops(NewElts, DAG.getUNDEF(EltVT)); in SplitVecRes_VECTOR_SHUFFLE() 2946 [&Output, &DAG = DAG, NewVT]() { Output = DAG.getUNDEF(NewVT); }, in SplitVecRes_VECTOR_SHUFFLE() 2953 DAG.getUNDEF(NewV in SplitVecRes_VECTOR_SHUFFLE() [all...] |
| H A D | SelectionDAG.cpp | 2094 return getUNDEF(VT); in getVectorShuffle() 2108 N2 = getUNDEF(VT); in getVectorShuffle() 2162 return getUNDEF(VT); in getVectorShuffle() 2164 N2 = getUNDEF(VT); in getVectorShuffle() 2166 N1 = getUNDEF(VT); in getVectorShuffle() 2173 return getUNDEF(VT); in getVectorShuffle() 2199 return getUNDEF(VT); in getVectorShuffle() 2535 return getUNDEF(VT); in FoldSetCC() 2966 return getUNDEF(VT); in getSplatSourceVector() 5771 return DAG.getUNDEF(VT); in FoldBUILD_VECTOR() [all …]
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| H A D | LegalizeTypesGeneric.cpp | 450 SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType()); in ExpandOp_SCALAR_TO_VECTOR() 570 Lo = DAG.getUNDEF(LoVT); in SplitRes_UNDEF() 571 Hi = DAG.getUNDEF(HiVT); in SplitRes_UNDEF()
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| H A D | DAGCombiner.cpp | 3308 DAG.getUNDEF(CarryVT)); in visitADDO() 4213 DAG.getUNDEF(CarryVT)); in visitSUBO() 4675 return DAG.getUNDEF(VT); in simplifyDivRem() 10651 return DAG.getUNDEF(VT); in visitSRL() 12093 : DAG.getUNDEF(ScalarVT); in visitVECTOR_COMPRESS() 12927 Elts.push_back(DAG.getUNDEF(SVT)); in tryToFoldExtendOfConstant() 14174 return DAG.getUNDEF(VT); in visitANY_EXTEND() 14908 ? DAG.getUNDEF(VT) in visitEXTEND_VECTOR_INREG() 14934 return DAG.getUNDEF(VT); in visitTRUNCATE() 15144 return DAG.getUNDEF(VT); in visitTRUNCATE() [all …]
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| H A D | LegalizeVectorOps.cpp | 1236 Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), in ExpandANY_EXTEND_VECTOR_INREG() 1252 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG() 1295 Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), in ExpandZERO_EXTEND_VECTOR_INREG() 1338 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), ShuffleMask); in ExpandBSWAP() 1388 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), in ExpandBITREVERSE()
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| H A D | SelectionDAGBuilder.cpp | 471 return DAG.getUNDEF(ValueVT); in getCopyFromPartsVector() 674 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, PartVT, DAG.getUNDEF(PartVT), in widenVectorToPartType() 681 SDValue EltUndef = DAG.getUNDEF(PartEVT); in widenVectorToPartType() 1826 return DAG.getUNDEF(VT); in getValueImpl() 1879 Constants[i] = DAG.getUNDEF(EltVT); in getValueImpl() 4073 ConcatOps.push_back(DAG.getUNDEF(SrcVT)); in visitShuffleVector() 4090 SDValue UndefVal = DAG.getUNDEF(SrcVT); in visitShuffleVector() 4149 setValue(&I, DAG.getUNDEF(VT)); // Vectors are not used. in visitShuffleVector() 4157 Src = DAG.getUNDEF(VT); in visitShuffleVector() 4187 Res = DAG.getUNDEF(EltVT); in visitShuffleVector() [all …]
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| H A D | LegalizeFloatTypes.cpp | 686 return DAG.getUNDEF(N->getValueType(0)); in SoftenFloatRes_ExpOp() 694 return DAG.getUNDEF(N->getValueType(0)); in SoftenFloatRes_ExpOp() 724 return DAG.getUNDEF(N->getValueType(0)); in SoftenFloatRes_FFREXP() 911 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), in SoftenFloatRes_UNDEF() 2954 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), in PromoteFloatRes_UNDEF() 3321 return DAG.getUNDEF(MVT::i16); in SoftPromoteHalfRes_UNDEF()
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| H A D | LegalizeDAG.cpp | 1918 Vec2 = DAG.getUNDEF(VT); in ExpandBVWithShuffles() 1970 return DAG.getUNDEF(VT); in ExpandBUILD_VECTOR() 2033 Vec2 = DAG.getUNDEF(VT); in ExpandBUILD_VECTOR() 2070 Callee = DAG.getUNDEF(CodePtrTy); in ExpandLibCall() 3529 Ops.push_back(DAG.getUNDEF(EltVT)); in ExpandNode() 3578 Results.push_back(DAG.getUNDEF(Node->getValueType(0))); in ExpandNode() 4696 Results.push_back(DAG.getUNDEF(Node->getValueType(0))); in ConvertNodeToLibcall() 5733 SDValue Undef = DAG.getUNDEF(MidVT); in PromoteNode()
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| H A D | StatepointLowering.cpp | 1034 ActualCallee = DAG.getUNDEF(Callee.getValueType()); in LowerStatepoint()
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| H A D | TargetLowering.cpp | 685 return DAG.getUNDEF(VT); in SimplifyMultipleUseDemandedBits() 908 return DAG.getUNDEF(Op.getValueType()); in SimplifyMultipleUseDemandedBits() 1156 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedBits() 1168 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedBits() 3010 return DAG.getUNDEF(EltVT); in getKnownUndefForVectorBinop() 3077 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedVectorElts() 3108 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedVectorElts() 3252 Ops[i] = TLO.DAG.getUNDEF(Ops[0].getValueType()); in SimplifyDemandedVectorElts() 3326 TLO.DAG.getUNDEF(VT), Sub, in SimplifyDemandedVectorElts() 3718 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedVectorElts() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 829 return DAG.getUNDEF(VecTy); in buildHvxVectorReg() 917 DAG.getUNDEF(ExtTy), Mask); in buildHvxVectorReg() 1019 SDValue S = DAG.getVectorShuffle(ByteTy, dl, T, DAG.getUNDEF(ByteTy), Mask); in createHvxPrefixPred() 1041 ? DAG.getUNDEF(MVT::i64) in createHvxPrefixPred() 1067 SDValue Vec = ZeroFill ? getZero(dl, ByteTy, DAG) : DAG.getUNDEF(ByteTy); in createHvxPrefixPred() 1111 : DAG.getUNDEF(MVT::i8); in buildHvxVectorPred() 1131 : DAG.getUNDEF(MVT::i8); in buildHvxVectorPred() 1307 SDValue Undef = DAG.getUNDEF(ByteTy); in extractHvxSubvectorPred() 1561 DAG.getVectorShuffle(ByteTy, dl, Vor, DAG.getUNDEF(ByteTy), Mask); in compressHvxPred() 1702 Elems[i] = DAG.getUNDEF(NT in LowerHvxConcatVectors() [all...] |
| H A D | HexagonISelLowering.cpp | 2013 return DAG.getMergeValues({DAG.getUNDEF(ty(Op)), Trap}, dl); in replaceMemWithUndef() 2280 return DAG.getUNDEF(VecTy); in LowerVECTOR_SHUFFLE() 2534 return DAG.getUNDEF(VecTy); in buildVector32() 2625 return DAG.getUNDEF(VecTy); in buildVector64() 2846 ValR = getCombine(DAG.getUNDEF(MVT::i32), ValR, dl, MVT::i64, DAG); in insertVectorPred() 2862 return DAG.getUNDEF(MVT::i64); in expandPredicate() 2873 return DAG.getUNDEF(MVT::i32); in contractPredicate() 2876 SDValue S = DAG.getVectorShuffle(MVT::v8i8, dl, A, DAG.getUNDEF(MVT::v8i8), in contractPredicate() 2916 Concats.push_back(DAG.getUNDEF(ValTy)); in appendUndef() 3027 W = getCombine(DAG.getUNDEF(MV in LowerCONCAT_VECTORS() [all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3803 SDValue OpNode = IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector() 3807 Ops.push_back(IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector() 3834 Ops.append(Split ? 2 : 1, DAG.getUNDEF(EltVT)); in getConstVector() 3939 return DAG.getUNDEF(ResultVT); in extractSubVector() 4010 : DAG.getUNDEF(VT); in widenSubVector() 4071 Ops.push_back(DAG.getUNDEF(SubVT)); in collectConcatOps() 4102 Ops.push_back(DAG.getUNDEF(SubVT)); in collectConcatOps() 4364 SDValue Undef = DAG.getUNDEF(WideOpVT); in insert1BitVector() 4498 SDValue V = insertSubVector(DAG.getUNDEF(VT), V1, 0, DAG, dl, SubVectorWidth); in concatSubVectors() 4582 SmallVector<SDValue> Ops(Mask.size(), DAG.getUNDEF(VT.getScalarType())); in getVectorShuffle() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 284 SDValue getUNDEF(const SDLoc &DL, EVT VT) const; 966 SDValue SystemZDAGToDAGISel::getUNDEF(const SDLoc &DL, EVT VT) const { in getUNDEF() function in SystemZDAGToDAGISel 975 DL, VT, getUNDEF(DL, MVT::i64), N); in convertTo() 1070 getUNDEF(DL, OpcodeVT), in tryRISBGZero()
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| H A D | SystemZISelLowering.cpp | 1495 Value = DAG.getBuildVector(MVT::v2i64, DL, {Value, DAG.getUNDEF(MVT::i64)}); in convertLocVTToValVT() 3273 Op = DAG.getVectorShuffle(MVT::v4f32, DL, Op, DAG.getUNDEF(MVT::v4f32), Mask); in expandV4F32ToV2F64() 5255 IndexNodes[I] = DAG.getUNDEF(MVT::i32); in getGeneralPermuteNode() 5273 IndexNodes[I] = DAG.getUNDEF(MVT::i32); in getGeneralPermuteNode() 5383 return DAG.getUNDEF(VT); in getNode() 5390 Ops.push_back(DAG.getUNDEF(MVT::v16i8)); in getNode() 5584 return DAG.getUNDEF(VT); in buildScalarToVector() 5594 return DAG.getUNDEF(VT); in buildMergeScalars() 5609 return DAG.getUNDEF(MVT::v2i64); in joinDwords() 5665 ResidueOps.push_back(DAG.getUNDEF(ResidueOps[0].getValueType())); in tryBuildVectorShuffle() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1513 DAG.getConstant(PartOffset, DL, MVT::i32), DAG.getUNDEF(MVT::i32), in LowerFormalArguments() 1581 NewBldVec[i] = DAG.getUNDEF(MVT::f32); in CompactSwizzlableVector() 1584 NewBldVec[i] = DAG.getUNDEF(MVT::f32); in CompactSwizzlableVector() 1593 NewBldVec[i] = DAG.getUNDEF(NewBldVec[i].getValueType()); in CompactSwizzlableVector() 1790 Ops.append(NElts, DAG.getUNDEF(InVal.getValueType())); in PerformDAGCombine()
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| H A D | SIISelLowering.cpp | 2186 return DAG.getUNDEF(VT); in getPreloadedValue() 2920 InVals.push_back(DAG.getUNDEF(Arg.VT)); in LowerFormalArguments() 3395 InputReg = DAG.getUNDEF(ArgVT); in passSpecialInputs() 3400 InputReg = DAG.getUNDEF(ArgVT); in passSpecialInputs() 3481 InputReg = DAG.getUNDEF(MVT::i32); in passSpecialInputs() 3659 InVals.push_back(DAG.getUNDEF(Arg.VT)); in LowerCall() 5923 Elts.push_back(DAG.getUNDEF(MVT::i16)); in adjustLoadValueTypeImpl() 6018 return DAG.getUNDEF(VT); in lowerICMPIntrinsic() 6053 return DAG.getUNDEF(VT); in lowerFCMPIntrinsic() 7012 return DAG.getUNDEF(MVT::i32); in getSegmentAperture() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6204 SDValue Ops[] = {Chain, DAG.getUNDEF(VT), Mask, BasePtr, Index, Scale}; in LowerMGATHER() 6262 PassThru = PassThru->isUndef() ? DAG.getUNDEF(ContainerVT) in LowerMGATHER() 6382 LoadNode->getOffset(), Mask, DAG.getUNDEF(VT), LoadNode->getMemoryVT(), in LowerMLOAD() 6407 SDValue Undef = DAG.getUNDEF(MVT::i16); in LowerTruncateVectorStore() 6678 DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, XVT, DAG.getUNDEF(XVT), X, Zero); in LowerFLDEXP() 6680 DAG.getUNDEF(ExpVT), Exp, Zero); in LowerFLDEXP() 9982 DAG.getTargetInsertSubreg(Idx, DL, VecVT, DAG.getUNDEF(VecVT), In1); in LowerFCOPYSIGN() 9984 DAG.getTargetInsertSubreg(Idx, DL, VecVT, DAG.getUNDEF(VecVT), In2); in LowerFCOPYSIGN() 10769 DAG.getUNDEF(MVT::f32), TVal); in LowerSELECT() 10771 DAG.getUNDEF(MVT::f32), FVal); in LowerSELECT() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1150 SDValue ArgVal = DAG.getUNDEF(PtrVT); in LowerCall() 1158 SDValue ArgVal = DAG.getUNDEF(PtrVT); in LowerCall() 1371 : DAG.getUNDEF(In.VT)); in LowerFormalArguments() 2210 SDValue Src2 = ShuffleSrc2 ? ShuffleSrc2 : DAG.getUNDEF(VecT); in LowerBUILD_VECTOR() 2497 SrcType, SDLoc(N), CastOp, DAG.getUNDEF(SrcType), Shuffle->getMask()); in performVECTOR_SHUFFLECombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 476 return DAG.getUNDEF(VT); in lowerVECTOR_SHUFFLE_VREPLVEI() 896 return DAG.getUNDEF(VT); in lowerVECTOR_SHUFFLE_XVREPLVEI() 1318 return DAG.getUNDEF(VT); in lowerVECTOR_SHUFFLE() 1436 SDValue Vector = DAG.getUNDEF(ResTy); in lowerBUILD_VECTOR() 2232 return DAG.getMergeValues({DAG.getUNDEF(Op.getValueType()), Op.getOperand(0)}, in emitIntrinsicWithChainErrorMessage() 2697 Results.push_back(DAG.getUNDEF(N->getValueType(0))); in emitErrorAndReplaceIntrinsicResults() 3092 Results.push_back(DAG.getUNDEF(VT)); in ReplaceNodeResults()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 631 return DAG.getUNDEF(Op->getValueType(0)); in LowerSDIVSREM()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7709 SDValue N1 = DAG.getNode(ARMISD::VCVTN, dl, VT, DAG.getUNDEF(VT), Op0, in LowerBuildVectorOfFPTrunc() 7933 return DAG.getUNDEF(VT); in LowerBUILD_VECTOR() 8036 return DAG.getUNDEF(VT); in LowerBUILD_VECTOR() 8067 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT), in LowerBUILD_VECTOR() 8171 SDValue Vec = DAG.getUNDEF(VT); in LowerBUILD_VECTOR() 8285 DAG.getUNDEF(Src.ShuffleVec.getValueType())); in ReconstructShuffle() 8376 SDValue ShuffleOps[] = { DAG.getUNDEF(ShuffleVT), DAG.getUNDEF(ShuffleVT) }; in ReconstructShuffle() 8654 SDValue PredAsVector2 = V2.isUndef() ? DAG.getUNDEF(NewVT) in LowerVECTOR_SHUFFLE_i1() 9015 Ops.push_back(DAG.getUNDEF(EltVT)); in LowerVECTOR_SHUFFLE() 9236 SDValue Val = DAG.getUNDEF(MVT::v2f64); in LowerCONCAT_VECTORS() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8137 Op2 = DAG.getUNDEF(WideVT); in LowerTRUNCATEVector() 8603 NewResChain, DAG.getUNDEF(MVT::Other)); in spliceIntoChain() 8703 SDValue UndefVec = DAG.getUNDEF(VecVT); in widenVec() 8747 SignedConv ? DAG.getUNDEF(WideVT) : DAG.getConstant(0, dl, WideVT); in LowerINT_TO_FPVector() 9487 SDValue SplatNode = DAG.getUNDEF(MVT::v2i64); in LowerBUILD_VECTOR() 10130 DAG.getUNDEF(MVT::v16i8), Mask)) in LowerROTL() 14724 Ops.push_back(DAG.getUNDEF(SrcVT)); in combineElementTruncationToVectorTruncation() 14732 Ops.push_back(In.isUndef() ? DAG.getUNDEF(SrcVT) : In.getOperand(0)); in combineElementTruncationToVectorTruncation() 14841 DAG.getUNDEF(N->getValueType(0)), Ops); in combineBVOfConsecutiveLoads() 14875 DAG.getUNDEF(Input.getValueType()), ShuffleMask); in addShuffleForVecExtend()
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