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Searched refs:getSubRegIndexLaneMask (Results 1 – 25 of 30) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp173 MO1UsedLanes = UsedLanes & ~TRI->getSubRegIndexLaneMask(SubIdx); in transferUsedLanes()
234 DefinedLanes &= TRI->getSubRegIndexLaneMask(SubIdx); in transferDefinedLanes()
241 DefinedLanes &= TRI->getSubRegIndexLaneMask(SubIdx); in transferDefinedLanes()
245 DefinedLanes &= ~TRI->getSubRegIndexLaneMask(SubIdx); in transferDefinedLanes()
369 UsedLanes |= TRI->getSubRegIndexLaneMask(SubReg); in determineInitialUsedLanes()
420 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg); in isUndefRegAtInput()
H A DLiveIntervalCalc.cpp60 LaneBitmask SubMask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg) in calculate()
160 LaneBitmask SLM = TRI.getSubRegIndexLaneMask(SubReg); in extendToUses()
H A DTargetRegisterInfo.cpp526 LaneBitmask SubRegMask = getSubRegIndexLaneMask(Idx); in getCoveringSubRegIndexes()
553 LaneBitmask LanesLeft = LaneMask & ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
558 LaneBitmask SubRegMask = getSubRegIndexLaneMask(Idx); in getCoveringSubRegIndexes()
584 LanesLeft &= ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
H A DLiveRangeEdit.cpp141 LaneBitmask LM = SubReg ? TRI->getSubRegIndexLaneMask(SubReg) in allUsesAvailableAt()
274 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in useIsKill()
408 Alloc, TRI->getSubRegIndexLaneMask(DestSubReg)); in eliminateDeadDef()
H A DRegisterCoalescer.cpp1546 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(NewIdx); in reMaterializeTrivialDef()
1690 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy()
1738 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(DstSubIdx); in eliminateUndefCopy()
1757 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in eliminateUndefCopy()
1792 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubRegIdx); in addUndefFlag()
1875 LaneBitmask UsedLanes = TRI->getSubRegIndexLaneMask(SubIdx); in updateRegDefsUses()
1949 LaneBitmask SubRegMask = TRI->getSubRegIndexLaneMask(SubRegIdx); in setUndefOnPrunedSubRegUses()
2526 ValidLanes = TRI.getSubRegIndexLaneMask(ImpDef.getOperand(0).getSubReg()); in mustKeepImplicitDef()
2655 L |= TRI->getSubRegIndexLaneMask( in computeWriteLanes()
2755 : TRI->getSubRegIndexLaneMask(SubIdx); in analyzeValue()
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H A DRenameIndependentSubregs.cpp183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents()
227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands()
H A DLiveIntervals.cpp586 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses()
803 LaneBitmask UseMask = SubReg ? TRI->getSubRegIndexLaneMask(SubReg) in addKillFlags()
1045 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg) in updateAllRanges()
1062 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg) in updateAllRanges()
1477 && (TRI.getSubRegIndexLaneMask(SubReg) & LaneMask).none()) in findLastUseBefore()
1610 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg); in repairOldRegInRange()
1705 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg); in repairIntervalsInRange()
H A DLivePhysRegs.cpp167 if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any()) in addBlockLiveIns()
H A DMachineInstrBundle.cpp322 LaneBitmask SubRegMask = TRI.getSubRegIndexLaneMask(SubReg); in AnalyzeVirtRegLanesInBundle()
H A DTwoAddressInstructionPass.cpp1682 RemainingUses |= TRI->getSubRegIndexLaneMask(MO.getSubReg()); in processTiedPairs()
1937 TRI->getSubRegIndexLaneMask(mi->getOperand(0).getSubReg()); in run()
2009 UndefLanes |= TRI->getSubRegIndexLaneMask(SubIdx); in eliminateRegSequence()
2070 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in eliminateRegSequence()
H A DLiveInterval.cpp898 LaneBitmask OrigMask = TRI.getSubRegIndexLaneMask(MOI->getSubReg()); in stripValuesNotDefiningMask()
978 LaneBitmask DefMask = TRI.getSubRegIndexLaneMask(SubReg); in computeSubRangeUndefs()
H A DVirtRegMap.cpp398 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(SubRegIdx); in readsUndefSubreg()
H A DRegisterPressure.cpp555 ? TRI.getSubRegIndexLaneMask(SubRegIdx) in pushRegLanes()
1236 LaneBitmask UseMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findUseBetween()
H A DPeepholeOptimizer.cpp2042 !(TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
2043 TRI->getSubRegIndexLaneMask(InsertedReg.SubIdx)).none()) in getNextSourceFromInsertSubreg()
H A DMachineVerifier.cpp2852 ? TRI->getSubRegIndexLaneMask(SubRegIdx) in checkLiveness()
2950 ? TRI->getSubRegIndexLaneMask(SubRegIdx) in checkLiveness()
3462 (TRI->getSubRegIndexLaneMask(MOI->getSubReg()) & LaneMask).none()) in verifyLiveRangeValue()
3598 Sub != 0 ? TRI->getSubRegIndexLaneMask(Sub) : LaneBitmask::getAll(); in verifyLiveRangeSegment()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFormMemoryClauses.cpp176 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in canBundle()
226 ? TRI->getSubRegIndexLaneMask(MO.getSubReg()) in collectRegUses()
H A DGCNRewritePartialRegUses.cpp362 return SR.LaneMask == TRI->getSubRegIndexLaneMask(P.first); in updateLiveIntervals()
392 TRI->getSubRegIndexLaneMask(NewSubReg), SR); in updateLiveIntervals()
H A DSIRegisterInfo.h394 return getNumCoveredRegs(getSubRegIndexLaneMask(SubReg));
H A DSIRegisterInfo.cpp325 assert(getSubRegIndexLaneMask(AMDGPU::sub0).getAsInteger() == 3 && in SIRegisterInfo()
326 getSubRegIndexLaneMask(AMDGPU::sub31).getAsInteger() == (3ULL << 62) && in SIRegisterInfo()
327 (getSubRegIndexLaneMask(AMDGPU::lo16) | in SIRegisterInfo()
328 getSubRegIndexLaneMask(AMDGPU::hi16)).getAsInteger() == in SIRegisterInfo()
329 getSubRegIndexLaneMask(AMDGPU::sub0).getAsInteger() && in SIRegisterInfo()
3168 LaneBitmask SubLanes = SubReg ? getSubRegIndexLaneMask(SubReg) in findReachingDef()
H A DSIShrinkInstructions.cpp590 LaneBitmask Overlap = TRI->getSubRegIndexLaneMask(SubReg) & in instAccessReg()
591 TRI->getSubRegIndexLaneMask(MO.getSubReg()); in instAccessReg()
H A DSIWholeQuadMode.cpp328 SubReg ? TRI->getSubRegIndexLaneMask(SubReg) in markDefs()
390 : TRI->getSubRegIndexLaneMask(Op.getSubReg()); in markDefs()
H A DGCNRegPressure.cpp254 MRI.getTargetRegisterInfo()->getSubRegIndexLaneMask(MO.getSubReg()); in getDefRegMask()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DRDFCopy.cpp165 if (RR.Mask == TRI.getSubRegIndexLaneMask(S.getSubRegIndex())) in run()
H A DHexagonBlockRanges.cpp246 if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any()) in getLiveIns()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h408 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask() function

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