Searched refs:getSourceReg (Results 1 – 10 of 10) sorted by relevance
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizationArtifactCombiner.h | 286 const Register MergeSrcReg = SrcMerge->getSourceReg(0); in tryCombineTrunc() 329 SrcRegs[i] = SrcMerge->getSourceReg(i); in tryCombineTrunc() 623 Register Src1Reg = Concat.getSourceReg(0); in findValueFromConcat() 655 Register Src1Reg = BV.getSourceReg(0); in findValueFromBuildVector() 942 MI.getSourceReg(i), EltSize, EltUnmergeIdx); in isSequenceFromUnmerge() 949 MRI.getVRegDef(MI.getSourceReg(i))->getOpcode() != in isSequenceFromUnmerge() 960 Register Elt0 = MI.getSourceReg(0); in tryCombineMergeLike() 973 Register UnmergeSrc = Unmerge->getSourceReg(); in tryCombineMergeLike() 1010 auto NewUnmerge = MIB.buildUnmerge(DstTy, Unmerge->getSourceReg()); in tryCombineMergeLike() 1034 auto *UnmergeI = findUnmergeThatDefinesReg(MI.getSourceReg(i), in tryCombineMergeLike() [all …]
|
H A D | GenericMachineInstrs.h | 254 Register getSourceReg() const { return getOperand(getNumDefs()).getReg(); } in getSourceReg() function 269 Register getSourceReg(unsigned I) const { return getReg(I + 1); } in getSourceReg() function 806 Register getSourceReg() const { return getOperand(1).getReg(); } in getSourceReg() function
|
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelperVectorOps.cpp | 203 B.buildCopy(Dst, Build->getSourceReg(MaybeIndex->Value.getZExtValue())); in matchExtractVectorElementWithBuildVector() 263 LLT SrcTy = MRI.getType(Build->getSourceReg(0)); in matchExtractVectorElementWithBuildVectorTrunc() 270 B.buildTrunc(Dst, Build->getSourceReg(MaybeIndex->Value.getZExtValue())); in matchExtractVectorElementWithBuildVectorTrunc()
|
H A D | Utils.cpp | 794 auto MaybeCst = ConstantFoldBinOp(Opcode, SrcVec1->getSourceReg(Idx), in ConstantFoldVectorBinop() 795 SrcVec2->getSourceReg(Idx), MRI); in ConstantFoldVectorBinop() 1006 if (auto MaybeFold = tryFoldScalar(BV->getSourceReg(SrcIdx))) { in ConstantFoldCountZeros() 1072 TryFoldScalar(BV1->getSourceReg(I), BV2->getSourceReg(I))) { in ConstantFoldICmp() 1488 if (getIConstantVRegValWithLookThrough(BV->getSourceReg(SrcIdx), MRI) || in isConstantOrConstantVector() 1489 getOpcodeDef<GImplicitDef>(BV->getSourceReg(SrcIdx), MRI)) in isConstantOrConstantVector() 1764 getIConstantVRegValWithLookThrough(BV->getSourceReg(I), MRI); in shiftAmountKnownInRange() 1913 if (!::isGuaranteedNotToBeUndefOrPoison(BV->getSourceReg(I), MRI, in isGuaranteedNotToBeUndefOrPoison()
|
H A D | CombinerHelper.cpp | 387 if (MRI.getType(ConcatMI1->getSourceReg(0)) != in matchCombineShuffleConcat() 388 MRI.getType(ConcatMI2->getSourceReg(0))) in matchCombineShuffleConcat() 418 Ops.push_back(ConcatMI1->getSourceReg(Mask[i] / ConcatSrcNumElt)); in matchCombineShuffleConcat() 420 Ops.push_back(ConcatMI2->getSourceReg(Mask[i] / ConcatSrcNumElt - in matchCombineShuffleConcat() 2091 MergedValues.emplace_back(Merge.getSourceReg(I)); in matchCombineMergeUnmerge() 2101 MatchInfo = Unmerge->getSourceReg(); in matchCombineMergeUnmerge() 2118 Register SrcReg = peekThroughBitcast(Unmerge.getSourceReg(), MRI); in matchCombineUnmergeMergeToPlainValues() 2125 LLT SrcMergeTy = MRI.getType(SrcInstr->getSourceReg(0)); in matchCombineUnmergeMergeToPlainValues() 2133 Operands.push_back(SrcInstr->getSourceReg(Idx)); in matchCombineUnmergeMergeToPlainValues() 6618 getOpcodeDef<GImplicitDef>(BuildVector->getSourceReg(I), MRI); in isConstantSplatVector() [all …]
|
H A D | LegalizerHelper.cpp | 3456 MIRBuilder.buildBitcast(SrcScalTy, ConcatMI->getSourceReg(i)) in bitcastConcatVector()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerCombiner.cpp | 261 LLT SrcTy = MRI.getType(Merge.getSourceReg(0)); in matchFoldMergeToZext() 264 return mi_match(Merge.getSourceReg(1), MRI, m_SpecificICst(0)); in matchFoldMergeToZext() 364 getIConstantVRegValWithLookThrough(BV1->getSourceReg(I), MRI); in matchOrToBSP() 366 getIConstantVRegValWithLookThrough(BV2->getSourceReg(I), MRI); in matchOrToBSP()
|
H A D | AArch64PostLegalizerLowering.cpp | 1105 MachineInstr *Ext = getOpcodeDef(AArch64::G_EXT, Unmerge.getSourceReg(), MRI); in matchUnmergeExtToUnmerge()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86LegalizerInfo.cpp | 609 Register Source = BuildVector.getSourceReg(i); in legalizeBuildVector()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.cpp | 3970 MachineInstr *ElF32 = MRI->getVRegDef(BV->getSourceReg(0)); in selectWMMAModsF32NegAbs() 3975 ElF32 = MRI->getVRegDef(BV->getSourceReg(i)); in selectWMMAModsF32NegAbs() 4001 if (!mi_match(CV->getSourceReg(i), *MRI, m_GFNeg(m_Reg(FNegSrc)))) in selectWMMAModsF16Neg() 4026 MachineInstr *ElV2F16 = MRI->getVRegDef(CV->getSourceReg(0)); in selectWMMAModsF16NegAbs() 4033 ElV2F16 = MRI->getVRegDef(CV->getSourceReg(i)); in selectWMMAModsF16NegAbs()
|