| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 1173 DAG.getSignedConstant(~31, DL, MVT::i32)); in LowerDYNAMIC_STACKALLOC()
1307 DAG.getSignedConstant(-ArgAlignInBytes, DL, MVT::i32)); in LowerVAARG()
1356 SDValue MinusRegisterSize = DAG.getSignedConstant(-32, DL, VT); in LowerShiftLeftParts()
1397 SDValue MinusRegisterSize = DAG.getSignedConstant(-32, DL, VT); in LowerShiftRightParts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSelectionDAGInfo.cpp | 66 DAG.getSignedConstant(0 - Adj, DL, MVT::i64)); in emitMemMemReg()
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| H A D | SystemZISelDAGToDAG.cpp | 2040 CurDAG->getSignedConstant(IPM.AddValue, DL, MVT::i32)); in expandSelectBoolean()
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| H A D | SystemZISelLowering.cpp | 4009 DAG.getSignedConstant(Offset, DL, PtrVT)); in lowerGlobalAddress()
4269 DAG.getSignedConstant(Offset, DL, PtrVT)); in lowerRETURNADDR()
5057 DAG.getSignedConstant(-4, DL, PtrVT)); in getCSAddressAndShifts()
5096 Src2 = DAG.getSignedConstant(-Const->getSExtValue(), DL, in lowerATOMIC_LOAD_OP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2475 RHS = DAG.getSignedConstant(C + 1, DL, RHS.getValueType()); in translateSetCCForBranch()
2494 RHS = DAG.getSignedConstant(C + 1, DL, RHS.getValueType()); in translateSetCCForBranch()
3797 SDValue SplatStep = DAG.getSignedConstant(SplatStepVal, DL, VIDVT); in lowerBuildVectorViaVID()
3806 SDValue SplatAddend = DAG.getSignedConstant(Addend, DL, VIDVT); in lowerBuildVectorViaVID()
3996 SDValue Elt = DAG.getSignedConstant(Bits, DL, XLenVT); in lowerBuildVectorOfConstants()
4072 DAG.getSignedConstant(SplatValue, DL, XLenVT), 0); in lowerBuildVectorOfConstants()
4139 DAG.getSignedConstant(SplatValue, DL, XLenVT), ViaVL); in lowerBuildVectorOfConstants()
8086 DL, VT, LHS, DAG.getSignedConstant(Imm + 1, DL, OpVT), CCVal); in LowerOperation()
9167 DAG.getSignedConstant(TrueImm - FalseImm, DL, VT)); in lowerSELECT()
9169 DAG.getSignedConstant(FalseImm, DL, VT)); in lowerSELECT()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1824 DAG.getSignedConstant(-Alignment.value(), dl, VT)); in ExpandDYNAMIC_STACKALLOC()
2462 const SDValue MaxExp = DAG.getSignedConstant(MaxExpVal, dl, ExpVT); in expandLdexp()
2463 const SDValue MinExp = DAG.getSignedConstant(MinExpVal, dl, ExpVT); in expandLdexp()
2465 const SDValue DoubleMaxExp = DAG.getSignedConstant(2 * MaxExpVal, dl, ExpVT); in expandLdexp()
2507 DAG.getSignedConstant(3 * MinExpVal + 2 * Precision, dl, ExpVT); in expandLdexp()
2518 DAG.getSignedConstant(2 * MinExpVal + Precision, dl, ExpVT), ISD::SETULT); in expandLdexp()
2622 SDValue MinExp = DAG.getSignedConstant(MinExpVal, dl, ExpVT); in expandFrexp()
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| H A D | SelectionDAGISel.cpp | 3861 CurDAG->getSignedConstant(Val, SDLoc(NodeToMatch), VT, in SelectCodeCommon()
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| H A D | SelectionDAGBuilder.cpp | 4561 DAG.getSignedConstant(~StackAlignMask, dl, IntPtr)); in visitAlloca()
12679 DAG.getSignedConstant( in visitVectorSplice()
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| H A D | SelectionDAG.cpp | 1789 SDValue SelectionDAG::getSignedConstant(int64_t Val, const SDLoc &DL, EVT VT, in getSignedConstant() function in SelectionDAG
2671 getSignedConstant(-(int64_t)MA->value(), dl, VAList.getValueType())); in expandVAArg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 1210 {Ptr, DAG.getSignedConstant(-4, DL, MVT::i64)}); in lowerATOMIC_SWAP()
1230 {Ptr, DAG.getSignedConstant(-4, DL, MVT::i64)}); in lowerATOMIC_SWAP()
1595 DAG.getSignedConstant(-Align, DL, PtrVT)); in lowerVAARG()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 3420 DAG.getSignedConstant(-(uint64_t)Align, DL, VT)); in LowerDYNAMIC_STACKALLOC()
3447 SDValue MinusRegisterSize = DAG.getSignedConstant(-32, DL, VT); in LowerShiftLeftParts()
3499 SDValue MinusRegisterSize = DAG.getSignedConstant(-32, DL, VT); in LowerShiftRightParts()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 692 LLVM_ABI SDValue getSignedConstant(int64_t Val, const SDLoc &DL, EVT VT,
725 return getSignedConstant(Val, DL, VT, true, isOpaque);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 672 RHS = DAG.getSignedConstant(C->getSExtValue() + 1, DL, VT); in getAVRCmp()
1059 Offset = DAG.getSignedConstant(RHSC, DL, MVT::i8); in getPreIndexedAddressParts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2191 SDValue NewMask = DAG.getSignedConstant(Mask >> ShiftAmt, DL, VT); in foldMaskedShiftToScaledMask()
2446 SDValue ExtVal = CurDAG->getSignedConstant(Offset, DL, VT); in matchIndexRecursively()
4576 SDValue NewCst = CurDAG->getSignedConstant(ShiftedVal, dl, NVT); in tryShrinkShlLogicImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 259 DAG.getSignedConstant(Offset - FoldedOffset, DL, MVT::i32); in LowerGlobalAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 4200 DAG.getSignedConstant(-ScaledAlignment, dl, VT)); in LowerDYNAMIC_STACKALLOC()
7174 SDValue MinExp = DAG.getSignedConstant(minIntN(16), DL, ExpVT); in lowerFLDEXP()
7177 SDValue MaxExp = DAG.getSignedConstant(maxIntN(16), DL, ExpVT); in lowerFLDEXP()
8038 DAG.getSignedConstant(EltIdx0, SL, MVT::i32)); in lowerVECTOR_SHUFFLE()
8042 DAG.getSignedConstant(EltIdx1, SL, MVT::i32)); in lowerVECTOR_SHUFFLE()
11822 SDValue ScaleDownFactor = DAG.getSignedConstant(-128, DL, MVT::i32); in lowerFSQRTF64()
15416 DAG.getSignedConstant(TrueNodeExpVal, SL, IntVT), in performFMulCombine()
15417 DAG.getSignedConstant(FalseNodeExpVal, SL, IntVT)); in performFMulCombine()
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| H A D | R600ISelLowering.cpp | 957 return DAG.getSignedConstant(TM.getNullPointerValue(DestAS), SL, VT); in lowerADDRSPACECAST()
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| H A D | SIInstrInfo.td | 942 return CurDAG->getSignedConstant(-N->getSExtValue(), SDLoc(N), MVT::i32);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 2676 DAG.getSignedConstant(Offset, DL, VT)); in lowerFRAMEADDR()
3705 DAG.getSignedConstant(-(int)Subtarget.getGRLen(), DL, VT); in lowerShiftLeftParts()
3757 DAG.getSignedConstant(-(int)Subtarget.getGRLen(), DL, VT); in lowerShiftRightParts()
4845 DAG.getSignedConstant(CN1->getSExtValue() >> MaskIdx0, DL, ValTy), in performORCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1218 {ByteIdxV, DAG.getSignedConstant(-4, dl, MVT::i32)}); in insertHvxElementReg()
2304 {HiVec, LoVec, DAG.getSignedConstant(-4, dl, MVT::i32)}, DAG); in LowerHvxFpExtend()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3965 SExt, DAG.getSignedConstant(ValueofRHS, DL, RHS.getValueType()), CC, in getAArch64Cmp()
11828 DAG.getSignedConstant(GPRSize, DL, PtrVT)); in LowerAAPCS_VASTART()
11846 DAG.getSignedConstant(FPRSize, DL, PtrVT)); in LowerAAPCS_VASTART()
11859 DAG.getStore(Chain, DL, DAG.getSignedConstant(-GPRSize, DL, MVT::i32), in LowerAAPCS_VASTART()
11867 DAG.getStore(Chain, DL, DAG.getSignedConstant(-FPRSize, DL, MVT::i32), in LowerAAPCS_VASTART()
11933 DAG.getSignedConstant(-(int64_t)Align->value(), DL, PtrVT)); in LowerVAARG()
16181 DAG.getSignedConstant(-(uint64_t)Align->value(), DL, VT)); in LowerWindowsDYNAMIC_STACKALLOC()
16218 DAG.getSignedConstant(-(uint64_t)Align->value(), DL, VT)); in LowerWindowsDYNAMIC_STACKALLOC()
16246 DAG.getSignedConstant(-(uint64_t)Align->value(), DL, VT)); in LowerInlineDYNAMIC_STACKALLOC()
21635 DAG.getSignedConstant(-ShiftAmount, DL, MVT::i32)); in tryCombineShiftImm()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1014 ? DAG.getSignedConstant(CN1->getSExtValue() >> SMPos0, DL, ValTy) in performORCombine()
2458 DAG.getSignedConstant(-(int64_t)Align.value(), DL, in lowerVAARG()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 5193 .getSignedConstant( in isBLACompatibleAddress()
8888 DAG.getSignedConstant(-2048, dl, MVT::i64)); in LowerINT_TO_FP()
9267 DAG.getSignedConstant(-BitWidth, dl, AmtVT)); in LowerSHL_PARTS()
9296 DAG.getSignedConstant(-BitWidth, dl, AmtVT)); in LowerSRL_PARTS()
9324 DAG.getSignedConstant(-BitWidth, dl, AmtVT)); in LowerSRA_PARTS()
9896 SDValue Elt = DAG.getSignedConstant(SextVal, dl, MVT::i32); in LowerBUILD_VECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2792 DAG.getSignedConstant(-MaybeAlignment->value(), dl, VT)) in LowerDYNAMIC_STACKALLOC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 3068 DAG.getSignedConstant(-(int64_t)MA->value(), DL, in LowerVAARG()
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