| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1643 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1663 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 834 ISD::CondCode InverseCC = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
874 ISD::CondCode CCInv = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
900 CCOpcode = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
1865 LHSCC = ISD::getSetCCInverse(LHSCC, LHS.getOperand(0).getValueType()); in PerformDAGCombine()
|
| H A D | AMDGPUISelLowering.cpp | 4647 getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), LHS.getValueType()); in performSelectCombine()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2812 CC = getSetCCInverse(CC, VT0); in combineSelect()
2876 CC = getSetCCInverse(CC, LHSVT); in combineSelectCC()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 417 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
430 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
4044 Cond = ISD::getSetCCInverse(Cond, OpVT); in foldSetCCWithAnd()
4133 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
4634 ISD::CondCode InvCond = ISD::getSetCCInverse( in SimplifySetCC()
4810 CC = ISD::getSetCCInverse(CC, N0.getOperand(0).getValueType()); in SimplifySetCC()
11562 InvCC = getSetCCInverse(CCCode, OpVT); in LegalizeSetCCCondCode()
|
| H A D | SelectionDAG.cpp | 603 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, EVT Type) { in getSetCCInverse() function in ISD
607 ISD::CondCode ISD::GlobalISel::getSetCCInverse(ISD::CondCode Op, in getSetCCInverse() function in ISD::GlobalISel
|
| H A D | LegalizeDAG.cpp | 4196 ISD::CondCode InvCC = ISD::getSetCCInverse(CCOp, Tmp1.getValueType()); in ExpandNode()
|
| H A D | DAGCombiner.cpp | 9457 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR()
12435 SatCC = ISD::getSetCCInverse(SatCC, VT.getScalarType()); in visitVSELECT()
12482 SatCC = ISD::getSetCCInverse(SatCC, VT.getScalarType()); in visitVSELECT()
27729 CC = ISD::getSetCCInverse(CC, CmpOpVT); in SimplifySelectCC()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7546 if (CC == ISD::getSetCCInverse(CC2, LHS2.getValueType())) in matchSetCC()
7552 if (CC == ISD::getSetCCInverse(CC2, LHS2.getValueType())) in matchSetCC()
7864 TargetCC = DAG.getCondCode(ISD::getSetCCInverse(CCVal, LHS.getValueType())); in lowerSELECT()
13474 CCVal = ISD::getSetCCInverse(CCVal, SetCCOpVT); in combineSubOfBoolean()
13847 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in performXORCombine()
15755 CCVal = ISD::getSetCCInverse(CCVal, SetCCOpVT); in tryDemorganOfBooleanCondition()
15801 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
15845 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
15853 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
16971 DAG.getSetCC(DL, VT, LHS, RHS, ISD::getSetCCInverse(CCVa in PerformDAGCombine()
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3398 changeFPCCToAArch64CC(getSetCCInverse(CC, /* FP inverse */ MVT::f32), in changeVectorFPCCToAArch64CC()
3690 CC = getSetCCInverse(CC, LHS.getValueType()); in emitConjunctionRec()
4129 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerXOR()
10347 LHS, RHS, ISD::getSetCCInverse(CC, LHS.getValueType()), CCVal, DAG, dl); in LowerSETCC()
10372 changeFPCCToAArch64CC(ISD::getSetCCInverse(CC, LHS.getValueType()), CC1, in LowerSETCC()
10418 ISD::CondCode CondInv = ISD::getSetCCInverse(Cond, VT); in LowerSETCCCARRY()
10497 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
10501 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
10508 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
10516 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 723 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
758 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 2189 ISD::CondCode NewCC = ISD::GlobalISel::getSetCCInverse(CC, true); in LowerSETCC()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5481 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5491 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5500 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5542 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
18264 CC = ISD::getSetCCInverse(CC, /* Integer inverse */ MVT::i32); in PerformHWLoopCombine()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4027 CC = ISD::getSetCCInverse(CC, InputVT); in getSETCCInGPR()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3259 CC = ISD::getSetCCInverse(CC, Mode == CmpMode::Int ? MVT::i32 : MVT::f32); in getVectorComparisonOrInvert()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 45508 ISD::CondCode NewCC = ISD::getSetCCInverse( in combineVSelectWithAllOnesOrZeros()
45845 ISD::getSetCCInverse(cast<CondCodeSDNode>(Cond.getOperand(2))->get(), in commuteSelect()
|